ADUC7033BCPZ-8L-RL Analog Devices Inc, ADUC7033BCPZ-8L-RL Datasheet - Page 11
ADUC7033BCPZ-8L-RL
Manufacturer Part Number
ADUC7033BCPZ-8L-RL
Description
IC MCU FLASH 96K ANLG I/O 48LFCS
Manufacturer
Analog Devices Inc
Type
Battery Managementr
Specifications of ADUC7033BCPZ-8L-RL
Input Type
Logic
Output Type
Logic
Interface
UART, SPI
Current - Supply
20mA
Mounting Type
Surface Mount
Package / Case
*
For Use With
EVAL-ADUC7033QSPZ - EVAL DEV QUICK START ADUC7033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 3. SPI Master Mode Timing (PHASE Mode = 0)
Parameter
t
t
t
t
t
t
t
t
t
t
1
2
SL
SH
DAV
DOSU
DSU
DHD
DF
DR
SR
SF
t
t
HCLK
UCLK
depends on the clock divider (CD) bits in POWCON MMR. t
= 48.8 ns and corresponds to the 20.48 MHz internal clock from the PLL before the clock divider.
(POLARITY = 0)
(POLARITY = 1)
Description
SCLK low pulse width
SCLK high pulse width
Data output valid after SCLK edge
Data output setup before SCLK edge
Data input setup time before SCLK edge
Data input hold time after SCLK edge
Data output fall time
Data output rise time
SCLK rise time
SCLK fall time
SCLK
SCLK
MOSI
MISO
t
DOSU
1
t
1
DSU
MSB IN
MSB
t
DHD
t
SH
Figure 3. SPI Master Mode Timing (PHASE Mode = 0)
2
t
DF
HCLK
2
t
DAV
= t
UCLK
t
SL
Rev. B | Page 11 of 140
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CD
t
DR
.
BITS [6:1]
BITS [6:1]
Min
0
3 × t
UCLK
Typ
(SPIDIV + 1) × t
(SPIDIV + 1) × t
3.5
3.5
3.5
3.5
½ t
SL
LSB IN
t
SR
LSB
HCLK
HCLK
t
SF
Max
(2 × t
UCLK
) + (2 × t
HCLK
ADuC7033
)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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