ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 34

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ATmega1284PR231

Manufacturer Part Number
ATmega1284PR231
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega1284PR231

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
16
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
7.1.2
7.1.2.1
8111C–MCU Wireless–09/09
Basic Operating Mode Description
P_ON - Power-On after V
pin 8 (/RST). A successful state change can be verified by reading the radio transceiver status
from register 0x01 (TRX_STATUS).
If TRX_STATUS = 0x1F (STATE_TRANSITION_IN_PROGRESS) the AT86RF231 is on a state
transition. Do not try to initiate a further state change while the radio transceiver is in
STATE_TRANSITION_IN_PROGRESS.
Pin SLP_TR is a multifunctional pin, refer to
(SLP_TR)” on page
causes the following state transitions:
Pin 8 (/RST) causes a reset of all registers (register bits CLKM_CTRL are shadowed, for details
refer to
transceiver into TRX_OFF state. However, if the device was in P_ON state it remains in the
P_ON state.
For all states except SLEEP, the state change commands FORCE_TRX_OFF or TRX_OFF lead
to a transition into TRX_OFF state. If the radio transceiver is in active receive or transmit states
(BUSY_*), the command FORCE_TRX_OFF interrupts these active processes, and forces an
immediate transition to TRX_OFF. In contrast a TRX_OFF command is stored until an active
state (receiving or transmitting) has been finished. After that the transition to TRX_OFF is
performed.
For a fast transition from receive or active transmit states to PLL_ON state the command
FORCE_PLL_ON is provided. In contrast to FORCE_TRX_OFF this command does not disable
the PLL and the analog voltage regulator AVREG. It is not available in states SLEEP, P_ON,
RESET, TRX_OFF, and all *_NOCLK states.
The completion of each requested state change shall always be confirmed by reading the regis-
ter bits TRX_STATUS (register 0x01, TRX_STATUS).
When the external supply voltage (V
goes into the P_ON state performing an on-chip reset. The crystal oscillator is activated and the
default 1 MHz master clock is provided at pin 17 (CLKM) after the crystal oscillator has stabi-
lized. CLKM can be used as a clock source to the microcontroller. The SPI interface and digital
voltage regulator are enabled.
The on-chip power-on-reset sets all registers to their default values. A dedicated reset signal
from the microcontroller at pin 8 (/RST) is not necessary, but recommended for hardware / soft-
ware synchronization reasons.
Whereas the falling edge of pin SLP_TR causes the following state transitions:
• TRX_OFF
• RX_ON
• PLL_ON
• SLEEP
• RX_ON_NOCLK
Section 9.6.4 “Master Clock Signal Output (CLKM)” on page
DD
27. Dependent on the radio transceiver state, a rising edge of pin SLP_TR
DD
SLEEP
RX_ON_NOCLK
BUSY_TX
TRX_OFF
RX_ON
) is firstly applied to the AT86RF231, the radio transceiver
Section 6.5 “Sleep/Wake-up and Transmit Signal
(level sensitive)
(level sensitive)
(level sensitive)
(level sensitive)
117) and forces the radio
AT86RF231
34

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