ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 39
ATmega1284PR231
Manufacturer Part Number
ATmega1284PR231
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT86RF231.pdf
(198 pages)
2.ATMEGA1284PR231.pdf
(380 pages)
3.ATMEGA1284PR231.pdf
(20 pages)
Specifications of ATmega1284PR231
Flash (kbytes)
128 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
16
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
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Figure 7-2.
7.1.4
7.1.4.1
8111C–MCU Wireless–09/09
TRX_STATE
SLP_TR
Typ. Processing Delay
Number of Octets
Frame Content
TRX_STATE
IRQ
Interrupt latency
IRQ
Basic Operating Mode Timing
Power-on Procedure
Timing of RX_START, AMI and TRX_END Interrupts in Basic Operating Mode
PLL_ON
-16
The following paragraphs depict state transitions and their timing properties. Timing figures are
explained in
page
The power-on procedure to P_ON state is shown in
Figure 7-3.
When the external supply voltage (V
ceiver enables the crystal oscillator (XOSC) and the internal 1.8 V voltage regulator for the
digital domain (DVREG). After t
(CLKM) at default rate of 1 MHz. If CLKM is available the SPI is already enabled and can be
used to control the transceiver. As long as no state change towards state TRX_OFF is per-
formed the radio transceiver remains in P_ON state.
0
Event
State
Block
Time
157.
16 µs
RX_ON
Preamble
Table 7-1 on page 42
Power-on Procedure to P_ON State
4
0
V
P_ON
XOSC, DVREG
DD
on
128
SFD
100
1
160
TR1
PHR
and
BUSY_TX
= 330 µs (typ.), the master clock signal is available at pin 17
1
t
TR1
192
DD
Section 12.4 “Digital Interface Timing Characteristics” on
) is firstly supplied to the AT86RF231, the radio trans-
IRQ_2 (RX_START)
MHR
t
IRQ
7
Figure 7-3 on page
400
BUSY_RX
IRQ_5 (AMI)
CLKM on
MSDU
t
IRQ
m
IRQ_3 (TRX_END)
192+(9+m)*32
FCS
39.
2
AT86RF231
PLL_ON
RX_ON
TRX_END
t
IRQ
Time [µs]
Time [µs]
39
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