RS8234 Mindspeed Technologies, RS8234 Datasheet - Page 128

• Manufacturer Part Number: RS8234
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

5.0 Reassembly Coprocessor
5.4 Buffer Management
5.4.6 Buffer Allocation
5.4.7 Error Conditions
5-24
The reassembly coprocessor performs buffer allocation when a new channel is
being reassembled, or when a buffer on an existing channel in process of being
reassembled, is full.
entry and free buffer queue entry. If the VLD bit is a logic low, a queue empty
condition has occurred. (The processing of this condition is described in
Section
assigned buffer to store payload data.
value. The READ index pointer and UPDATE counter are incremented. If the
UPDATE counter equals RSM_FQCTL(FBQ_UD_INT), then the READ index
pointer is written to the location pointed to by READ_UD_PNTR, and the
UPDATE counter is reset to zero.
index pointer is compared to the RS8234 READ index pointer located at
READ_UD_PNTR. If the WRITE index pointer + one is equal to the READ
index pointer, an overflow condition has been detected and further processing is
halted. Otherwise, the host writes and updates the free buffer queue entry with a
new buffer pointer, buffer descriptor pointer, and VLD bit set to a logic high. The
host then increments its WRITE index pointer.
An empty condition occurs when a buffer is needed and there are no available
buffers in the free buffer queue. If the BFR1 queue is empty and BFR1 does not
equal BFR0, then the RSM coprocessor checks the BFR0 queue before declaring
an empty condition.
the reassembly coprocessor will perform early packet discard on the channel and
write a status queue entry with the EPD and free buffer queue Underflow (UNDF)
bits set to a logic high. EPD functions are described in
buffer queue empty condition initially occurs at the beginning of a BOM cell, a
status queue entry is written with UNDF set to a logic high and BD_PNTR null.
In both cases, the RSM_HF_EMPT bit is set in the HOST_ISTAT1 and
LP_ISTAT1 registers if the BD_LOCAL bit is a logic low in the free buffer queue
base table, or the RSM_LF_EMPT bit is set if BD_LOCAL is a logic high.
receiving a BOM or SSM cell, the reassembly coprocessor checks the queue
indicated by BFR0 for a valid free buffer. If a free buffer exists, the RSM
coprocessor stores the cell in the assigned buffer.
CPCS_PDU discarded during this error condition.
until they need a new buffer. Once the host has written more free buffers on the
queue with VLD bit set to a logic high, the reassembly coprocessor will
automatically recover from the empty condition.
The reassembly coprocessor reads the appropriate free buffer queue base table
The VLD bit is then written to a logic low without corrupting the BD_PNTR
When the host wants to return a buffer to a free buffer queue, the host WRITE
If an empty condition occurs after the first buffer of a CPCS-PDU is written,
All cells of a PDU up to and including the next EOM cell are discarded. Upon
For AAL5 channels, the AAL5_DSC_CNT counter is incremented for each
Channels that have outstanding buffers from an empty queue are not affected
5.4.7.) If the VLD bit is a logic high, the reassembly coprocessor uses the
Mindspeed Technologies
ATM ServiceSAR Plus with xBR Traffic Management
™
Section
28234-DSH-001-B
5.4.8. Also, if a
RS8234