RS8234 Mindspeed Technologies, RS8234 Datasheet - Page 288

• Manufacturer Part Number: RS8234
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

13.0 RS8234 Registers
13.2 System Registers
13-6
20–16
9–7
6–0
Bit
25
24
23
22
21
15
14
13
12
11
10
Field
Size
1
1
1
1
1
5
1
1
1
1
1
1
3
7
PHY2_EN
INT_LBANK
Reserved
PCI_READ_MULTI
PCI_ARB
STATMODE[4:0]
FR_RMODE
(BT8222/3)
FR_LOOP
UTOPIA_MODE
ENDIAN
LP_BWAIT
MEMCTRL
BANKSIZE[2:0]
DIVIDER[6:0]
Name
Mindspeed Technologies
Enables the second PHY device memory space in standalone operation.
When set, allows only byte 0 and 1 writes to address space
0x1000–0x10ff and 0x1400–0x14ff. This allows endian neutral access of
the Status Queue Base Table READ_UD field by the host or local
processor.
Always set to zero.
When this bit is set, the SAR’s PCI Master implements the PCI Read
Multiple Command. Otherwise, the PCI Master implements the PCI Read
Command.
Selects PCI Master arbitration scheme. When a logic high, enables
round-robin between read and write requests. When a logic low, reads
have priority over writes.
Selects which internal status to output on the STAT[1:0] output pins.
Controls reassembly start of cell processing. When set low, processing
starts after the first two words of a cell are received. When set high, a
complete cell must be in reassembly FIFO before cell is processed.
When set, this bit enables loopback of cells at the ATM physical interface.
Loopback uses SYSCLK.
Selects byte or cell UTOPIA handshake mode.
0 = Octet handshake
1 = Cell handshake
Selects between Little and Big Endian host data structures.
0 = Little Endian
1 = Big Endian
Selects zero or one wait states between consecutive data cycles during
local processor burst accesses. Set to logic low for standalone operation
mode.
Selects zero or one wait states SAR shared memory (1 or 2 cycle).
Selects size of memory banks for contiguous memory support. See
Section
Prescaler for SYSCLK which advances the counter in the CLOCK Register.
SYSCLK is divided by the divider value; if zero, divided by 128.
9.2, for further explanation.
ATM ServiceSAR Plus with xBR Traffic Management
™
Description
28234-DSH-001-B
RS8234