RS8234 Mindspeed Technologies, RS8234 Datasheet - Page 156

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RS8234

Manufacturer Part Number
RS8234
Description
Atm Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet

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5.0 Reassembly Coprocessor
5.7 Reassembly Control and Status Structures
Table 5-33. Reassembly Status Queue Entry Descriptions (1 of 2)
5-52
BD_PNTR
UU
CPI
HEAD_VCC_INDEX
CPCS_LENGTH
PDU_CHECKS
VCC_INDEX
VLD
AAL34
Field Name
Bufferdescriptor pointer. In Message Mode, pointer to the first buffer descriptor in the linked list. In
Streaming Mode, pointer to an individual buffer descriptor.
AAL5 CPCS-UU field.
AAL5 CPCS-CPI field. In AAL0 PTI terminated mode, the least significant bit contains the most
significant bit of the total PDU length. The CPCS_LENGTH field contains the 16 least significant bits.
AAL3/4 Head VCC Table entry index. When CNT_ROVR = 1, AAL34 = 1, and FWD_PM = 0, this field
along with A3L2_ERR in the PDU_CHECKS field points to the MID that rolled over. This field is also
active when CNT_ROVR=0, AAL34=1, and FWD_PM=0.
AAL5 CPCS-LENGTH field. In AAL0 PTI terminated mode, it is the 16 least significant bits of the total
PDU length. The CPI field contains the most significant bit.
Set various error flags related to PDUs.
MOD_ERROR—AAL3/4 CPCS-PDU is not 32-bit aligned.
BA_ERROR—AAL5: Indicates that the total PDU length exceeds maximum length when AUU = 1.
AL_ERROR—AAL3/4 AL field is not all zeros.
LEN_ERROR—Total CPCS-PDU length exceeds maximum length and not at end of message.
PAD_ERROR—Pad field length is not correct.
CPI_ERROR—CPI field is not all zero.
TAG_ERROR—AAL3/4 Btag and Etag fields in the CPCS-PDU do not match.
CRC_ERROR—AAL5 CPCS or OAM CRC error.
ST_EPD—AAL3/4 Segment Type error; causes EPD.
SN_EPD—AAL3/4 Sequence Number error; causes EPD.
LI_EPD—AAL3/4 SAR-PDU length error; causes EPD.
LP—Value of CLP header bit ORed across the CPCS-PDU.
CI_LAST—Value of the PTI[1] header bit in the last cell of the CPCS-PDU.
CI—Value of the PTI[1] header bit ORed across the CPCS-PDU.
A3L2_ERR—When CNT_ROVR = 1, AAL34 = 1, and FWD_PM = 0, indicates which MIB counter rolled
over, based on these values:
VCC index of channel. If the connection is AAL3/4 and a CRC10 or MID error has occurred, this index
will point to a valid MID entry even though MID cannot be correctly resolved due to errors. In both
cases, CNT_ROVR will be set and the index is only used to indicate an AAL3/4 connection.
Valid. Indication that status entry is valid. The host must set to zero after processing status.
Indication that the status entry is relative to an AAL3/4 PDU. Also indicates that HEAD_VCC_INDEX
and A3L2_ERR fields are active.
NOTE:
0 = MID_ERR
1 = CRC10_ERR
2 = SN_ERR
3 = LI_ERR
4 = EOM_ERR
5 = BOM_SSM_ERR
This field is only active when FWD_PM = 0.
AAL3/4: BASIZE field error occurred.
Mindspeed Technologies
Description/Function
ATM ServiceSAR Plus with xBR Traffic Management
28234-DSH-001-B
RS8234

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