RS8234 Mindspeed Technologies, RS8234 Datasheet - Page 137

• Manufacturer Part Number: RS8234
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

RS8234
ATM ServiceSAR Plus with xBR Traffic Management
Figure 5-15. Status Queue Structure Format
28234-DSH-001-B
(From RSM VCC
Table Entry)
STAT
5.6.1.1 Setup
0x1000
Status Queue Base Table
At system initialization, set up the following fields in each of the status queue
base table entries:
the VLD bit to a logic low.
(Internal SRAM)
BASE_PNTR
WRITE
the base table)
(32 entries in
Figure 5-15
• Write the base address of the corresponding status queue in the
• Initialize the WRITE and READ_UD fields to zeroes.
• Set the SIZE field for the size of the corresponding status queue.
• Set the LOCAL bit to a status high if the status queue is in local memory;
In addition, initialize each status queue entry in all 32 status queues by setting
Initialize the READ pointers to zero for each status queue.
BASE_PNTR field.
otherwise set the bit to a logic low.
Mindspeed Technologies
illustrates this structure.
(32 Status Queues)
™
5.0 Reassembly Coprocessor
5.6 Status Queue Operation
100074_036
5-33