RS8234 Mindspeed Technologies, RS8234 Datasheet - Page 235
RS8234
Manufacturer Part Number
RS8234
Description
Atm Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet
1.RS8234.pdf
(401 pages)
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RS8234
ATM ServiceSAR Plus with xBR Traffic Management
Figure 8-2. Little Endian Misaligned Transfer
Figure 8-3. Big Endian Aligned Transfer
28234-DSH-001-B
Length (# of 32 bit words) = 3
Host Address = 01
from RSM block
10
Length (# of 32 bit words) = 3
2
6
Bytes
1
5
9
PCI Host Address Space
0
4
8
11
7
3
ATM Cell
0x00
0x04
0x08
0x0C
implied that the data is misaligned.
would map into the PCI host address space for a little endian system.
address space for a big endian system.
Address
When the RS8234 specifies a host address with the LSBs not equal to 00, it is
Figure 8-3
ATM Cell
Mindspeed Technologies
0
PCI Host Address Space
1
shows how a byte-aligned address would map into the PCI host
Host Address = 10
from RSM block
5
1
9
Host Address = 00 from RSM block
2
0
0
4
8
Bytes
3
1
11
3
7
4
4
0
8
2
10
2
6
5
Bytes
1
5
9
3
10
0x00
0x04
0x08
0x0C
6
6
2
4
7
11
7
3
5
Address
Figure 8-2
8
6
0x00
0x04
0x08
™
9
7
10
Address
8
Host Address = 11
from RSM block
shows how a misaligned address
11
0
4
8
9
11
10
Bytes
3
7
10
11
2
6
1
5
9
8.4 Misaligned Transfers
8.0 DMA Coprocessor
0x00
0x04
0x08
0x0C
Address
100074_064
100074_065
8-3
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