RS8234 Mindspeed Technologies, RS8234 Datasheet - Page 36

• Manufacturer Part Number: RS8234
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

2.0 Architecture Overview
2.2 High Performance Host Architecture with Buffer Isolation
Figure 2-2. RS8234 Queue Architecture
2-4
(1) Status queues may be optionally placed in SAR-shared memory.
NOTE(S):
Segmentation Function
Reassembly Function
Status Queues
Segmentation
Global OAM
Global OAM
(32)
Host Memory Area
SEG Status Queue
RSM Status Queue
Status Queues
Reassembly
location and availability to the free buffer queues, one of which may be
designated as the Global OAM free buffer queue. The reassembly coprocessor
uses the free buffer queue entries to allocate data buffers for received ATM cells
during reassembly.
One of these may be designated as the Global OAM segmentation status queue.
The host further processes these segmentation status queue entries.
these may be designated as the Global OAM reassembly status queue. The host
further processes these reassembly status queue entries.
reassembly and segmentation functions.
(1)
The host furnishes data buffers to the reassembly processor by posting their
The following queues exist in host (or optionally, SAR shared) memory:
• segmentation status queues (up to 32 queues)—includes the Global OAM
• reassembly status queues (up to 32 queues)—includes the Global OAM
The RS8234 reports segmentation status to the segmentation status queues.
The RS8234 reports reassembly status to the reassembly status queues. One of
The queues described above provide the control information that fuels the
segmentation status queue
reassembly status queue
Mindspeed Technologies
RS8234
ATM ServiceSAR Plus with xBR Traffic Management
RSM/SEG Queue
Segmentation Function
Reassembly Function
™
Global OAM
SAR-Shared Memory Area
Transmit Queues
Free Buffer Queues
Free Buffer Queue
(32)
28234-DSH-001-B
(32)
RS8234
100074_003