RS8234 Mindspeed Technologies, RS8234 Datasheet - Page 71

• Manufacturer Part Number: RS8234
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

RS8234
ATM ServiceSAR Plus with xBR Traffic Management
3.2.5 Local Processor Clients
Figure 3-3. Out-of-Band Control Architecture
28234-DSH-001-B
System
Host
PCI BUS
The RS8234 supports limited bandwidth SAR shared memory segmentation and
reassembly. Any peer may use the local processor port instead of the PCI bus for
control and status, as well as for data traffic. Hosts can use SAR shared memory
for control and status, but transfer data across the PCI bus. This “out-of-band”
control configuration diverts control overhead from the PCI bus, lessening the
burden of ATM’s high throughput and robust management requirements on the
host system.
Local Processor Port
Mindspeed Technologies
Figure 3-3
Subsystem
RS8234
shows an out-of-band control architecture.
LEGEND:
™
ATM
NETWORK
Data Flow
Host Control/Status Flow
3.2 Multiple Client Architecture
3.0 Host Interface
100074_013
3-5