tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 263
tmp19a44fda
Manufacturer Part Number
tmp19a44fda
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A44FDA.pdf
(672 pages)
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The Chip Selector and Wait Controller TMP19A44 (rev1.3) 9-10
multiplex bus.
BUSCR
(0xFF00_14C0) Read/Write
9.3 Bus Control Register
<ALESEL1:0>: Setting for ALE width cycle differs depending on a bus to be used: separate bus or
<WAITSMP>: Sampling point of WAIT input can be changed according to operating frequency.
Recommended value
2N: fsys = 4MHz~40MHz
4N: fsys = 40MHz~80MHz
Fig. 9.6 shows the bus control register BUSCR that is capable of setting ALE width and the number of
WAIT sampling.
bit Symbol
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
“0” is read.
7
0
15
23
31
0
0
0
Fig. 9.6 Bus Control Register
6
0
14
22
30
0
0
0
R
5
0
13
21
29
0
0
0
4
0
12
20
28
0
“0” is read.
0
“0” is read.
0
“0” is read.
R
R
R
3
0
11
19
27
0
0
0
WAITSMP
Specify
the
number
of waits
to be
sampled
0: 2N
1: 4N
R/W
2
0
10
18
26
0
0
0
TMP19A44
Multiplex bus
Separate bus
00: 1 cycle
01: 2 cycles
10: 3 cycles
11: 4 cycles
00: 0 cycle
01: 1 cycle
10: 2 cycles
11: 3 cycles
1
0
17
25
ALESEL
9
0
0
0
R/W
2010-04-01
0
1
16
24
0
0
8
0
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