tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 267

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

DMA Controller (DMAC)
10.3 Registers
The DMAC has fifty-one 32-bit registers. Table 10.1 shows the register map of the DMAC.
0xFF00_1200
0xFF00_1204
0xFF00_1208
0xFF00_120C
0xFF00_1210
0xFF00_1218
0xFF00_1220
0xFF00_1224
0xFF00_1228
0xFF00_122C
0xFF00_1230
0xFF00_1238
0xFF00_1240
0xFF00_1244
0xFF00_1248
0xFF00_124C
0xFF00_1250
0xFF00_1258
0xFF00_1260
0xFF00_1264
0xFF00_1268
0xFF00_126C
0xFF00_1270
0xFF00_1278
0xFF00_1280
0xFF00_1284
0xFF00_1288
0xFF00_128C
0xFF00_1290
0xFF00_1298
0xFF00_12A0
0xFF00_12A4
0xFF00_12A8
0xFF00_12AC
0xFF00_12B0
0xFF00_12B8
0xFF00_12C0
0xFF00_12C4
0xFF00_12C8
0xFF00_12CC
0xFF00_12D0
0xFF00_12D8
Address
Register symbol
Table 10.1 DMAC Registers (1 of 2)
DTCR0
DTCR1
DTCR2
DTCR3
DTCR4
DTCR5
DTCR6
DAR0
DAR1
DAR2
DAR3
DAR4
DAR5
DAR6
CCR0
CSR0
SAR0
BCR0
CCR1
CSR1
SAR1
BCR1
CCR2
CSR2
SAR2
BCR2
CCR3
CSR3
SAR3
BCR3
CCR4
CSR4
SAR4
BCR4
CCR5
CSR5
SAR5
BCR5
CCR6
CSR6
SAR6
BCR6
TMP19A44 (rev1.3) 10-4
Channel control register (ch. 0)
Channel status register (ch. 0)
Source address register (ch. 0)
Destination address register (ch. 0)
Byte count register (ch. 0)
DMA transfer control register (ch. 0)
Channel control register (ch. 1)
Channel status register (ch. 1)
Source address register (ch. 1)
Destination address register (ch. 1)
Byte count register (ch. 1)
DMA transfer control register (ch. 1)
Channel control register (ch. 2)
Channel status register (ch. 2)
Source address register (ch. 2)
Destination address register (ch. 2)
Byte count register (ch. 2)
DMA transfer control register (ch. 2)
Channel control register (ch. 3)
Channel status register (ch. 3)
Source address register (ch. 3)
Destination address register (ch. 3)
Byte count register (ch. 3)
DMA transfer control register (ch. 3)
Channel control register (ch. 4)
Channel status register (ch. 4)
Source address register (ch. 4)
Destination address register (ch. 4)
Byte count register (ch. 4)
DMA transfer control register (ch. 4)
Channel control register (ch. 5)
Channel status register (ch. 5)
Source address register (ch. 5)
Destination address register (ch. 5)
Byte count register (ch. 5)
DMA transfer control register (ch. 5)
Channel control register (ch. 6)
Channel status register (ch. 6)
Source address register (ch. 6)
Destination address register (ch. 6)
Byte count register (ch. 6)
DMA transfer control register (ch. 6)
Register name
TMP19A44
2010-04-01