tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 44
tmp19a44fda
Manufacturer Part Number
tmp19a44fda
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A44FDA.pdf
(672 pages)
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2-phase pulse input counter
Dynamic pull-up (KWUP)
TX19A/H1 processor core
DMAC
INTC
External bus I/F
IO port
TMRB
RTC
CG
High-speed oscillator (fc)
Low-speed oscillator (fs)
ADC
SIO
HSIO
I2C
TMRC
WDT
Clock/Standby Control
Oscillator
Clock source
Block
(Note)
5.7.2 CG Operations in Each Mode
5.7.3 Block Operations in Each Mode
(Note) Peripheral functions that can work in the SLOW mode: INTC, external bus interface,
: ON or clock supply ×: OFF or no clock supply
:ON ×:OFF
When the system enters the SLOW mode, the high-speed oscillator must be stopped
by setting the
IO port, clock timer, 2-phase pulse input counter and KWUP
Normal
Slow
Idle (Halt)
Idle (Doze)
Sleep/
Backup
Stop/
Backup
Mode
NORMAL
Table 5.5 Block Operating Status in Each Operation Mode
OSCCR1<XEN>.
Oscillatio
Table 5.4 Status of CG in Each Operation Mode
n circuit
Fs only
Δ (Note)
SLOW
×
×
×
×
×
×
×
×
TMP19A44(rev1.3) 5-15
PLL
ON/OFF selectable for each
×
×
×
(Doze)
IDLE
×
Clock supply to peripheral
Clock timer, 2-phase pulse input
counter and KWUP
module
Partial supply (Note)
Selectable
Selectable
(Halt)
IDLE
I/O
×
×
×
×
×
SLEEP
×
×
×
×
×
×
×
×
×
×
×
×
×
Clock supply to CPU
pull-up)
STOP
(Static
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
TMP19A44
×
×
×
Backup
SLEEP
(fs only)
2010-04-01
×
×
×
×
×
×
×
×
×
×
×
×
×
Backup
pull-up)
STOP
(Static
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
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