tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 381

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Serial Channel (SIO)
SC0FCNF
14.3.2.8
<RFST>:
<TFIE>:
<RFIE>:
<RXTXCNT>:
<CNFG>:
(Note)
bit Symbol
Read/Write
After reset
Regarding TX FIFO, the maximum number of bytes being configured is always
available. The available number of bytes is the bytes already written to the TX
FIFO.
FIFO Configuration Register
Function
Specifies bytes used in RX FIFO.
0:
(See description of <CNFG> bit.)
1:
<RIL1:0>.
When TX FIFO is enabled, transmit interrupts are enabled or disabled by this parameter.
When RX FIFO is enabled, receive interrupts are enabled or disabled by this parameter.
This parameter is to enable FIFO.
Setting “1” enables FIFO. If enabled, the SCOMOD1 <FDPX1:0> setting automatically
configures FIFO as follows: (the communication method can be set in the mode control register
1 SC0MOD1<FDPX1:0>).
Half duplex
RX
Half duplex
TX
Full duplex
The function to automatically disable RXE/TXE bits is disabled.
If “1” is set, it functions as shown below according to the communication method configured
(the
SC0MOD1<FDPX1:0>).
Half duplex
RX
Half duplex
TX
Full duplex
Be sure to write "000."
Reserved
communication
The maximum number of bytes of the FIFO configured is available.
Same as the fill level for receive interrupt generation specified by SC0RFC
7
0
RX FIFO 4byte
TX FIFO 4byte
RX FIFO 2byte＋TX FIFO 2byte
When the RX FIFO is filled up to the specified number of valid
bytes, SC0MOD0<RXE> is automatically set to "0" to inhibit further
reception.
When the TX FIFO is empty, SC0MOD1<TXE> is automatically set
to "0" to inhibit further transmission.
When either of the above two conditions is satisfied, TXE/RXE are
automatically set to "0" to inhibit further transmission and reception.
Reserved
TMP19A44(rev1.3) 14-29
6
0
method
Reserved
(Note)
5
0
can
1: Same as
Bytes
used in
RX FIFO
0:
Maximum
Fill level
of RX
FIFO
RFST
be
4
0
set
R/W
1: Enable
TX
interrupt
for TX
FIFO
0: Disable
in
TFIE
3
0
the
1: Enable
RX
interrupt
for RX
FIFO
0: Disable
mode
RFIE
2
0
TMP19A44
control
Automatic
disable of
RXE/TXE
0: None
RXTXCNT
1: Auto
1
0
Disa
ble
2010-04-01
register
FIFO
Enable
0: Disable
1: Enable
CNFG
0
0
1