tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 358

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Serial Channel (SIO)
•
Baud rate calculation for an external clock input:
1)
2)
Also, an external clock input may be used as the serial clock. The resulting baud rate
calculation is shown below:
UART mode
Baud Rate = external clock input / 16
In this, the period of the external clock input must be equal to or greater than 4/fsys.
I/O interface mode
Baud Rate = external clock input
When double buffering is used, it is necessary to satisfy the following relationship:
External clock input period > 12/fsys
Therefore, when fsys = 80 MHz, the baud rate must be set to a rate lower than 80 / 12 = 6.67
(Mbps).
When double buffering is not used, it is necessary to satisfy the following relationship:
External clock input period > 16/fsys
Therefore, when fsys = 80 MHz, the baud rate must be set to a rate lower than 80 / 16 = 5
(Mbps).
Example baud rates for the UART mode are shown in Table 14-2 andTable 14- 3.
If fsys = 80 MHz, the highest baud rate will be 80 / 4 / 16 = 1.25 (kbps).
TMP19A44(rev1.3) 14-6
TMP19A44
2010-04-01