tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 437

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Serial Bus Interface (SBI)
SCL line
SDA line
Start condition
16.5.6
16.5.7
Setting SBICR2 <TRX> to "1" configures the SBI as a transmitter. Setting <TRX> to "0" configures
the SBI as a receiver.
In the slave mode, the SBI receives the direction bit (
occasions:
If the value of the direction bit (
<TRX> is set to "0."
As a master device, the SBI receives acknowledgement from a slave device. If the direction bit of "1" is
transmitted, <TRX> is set to "0" by the hardware. If the direction bit is "0," <TRX> changes to "1." If
the SBI does not receive acknowledgement, <TRX> retains the previous value.
<TRX> is cleared to "0" by the hardware when the stop condition has been detected on the bus or when
arbitration has been lost.
When SBISR<BB> is "0," writing "1" to SBICR2 <MST, TRX, BB, PIN> causes the SBI to generate
the start condition on the bus and output 8-bit data. <ACK> must be set to "1" in advance.
When <BB> is "1," writing "1" to <MST, TRX, PIN> and "0" to <BB> causes the SBI to start a
sequence for generating the stop condition on the bus. The contents of <MST, TRX, BB, and PIN>
should not be altered until the stop condition appears on the bus.
SBISR<BB> can be read to check the bus state. <BB> is set to "1" when the start condition is detected
on the bus (the bus is busy), and set to "0" when the stop condition is detected (the bus is free).
Configuring the SBI as a Transmitter or a Receiver
Generating Start and Stop Conditions
•
•
•
Fig. 16.5 Generating the Start Condition and a Slave Address
when data is transmitted in the addressing format
when the received slave address matches the value specified at I2CCR
when a general-call address is received; i.e., the eight bits following the start condition
are all zeros
A6
SCL line
SDA line
Fig. 16.6 Generating the Stop Condition
1
TMP19A44 (rev1.3) 16-13
A5
2
R/
W
) is "1," <TRX> is set to "1" by the hardware. If the bit is "0,"
A4
Slave address and direction bit
3
A3
4
Stop condition
R/
A2
W
5
) from the master device on the following
A1
6
A0
7
TMP19A44
R/W
8
Acknowledgment
signal
2010-04-01
9