tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 495

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Real Time Clock (RTC)
PAGER
a read-modify-
write
operation
cannot be
performed.
RESTR
(0xFF00_150C)
A read-modify-
write
operation
cannot be
performed.
(Note) Keep the setting order of <ENATMR>, <ENAAML> and <INTENA> as shown in
Bit symbol
Read/Write
After reset
Function
(10) PAGE register (for PAGE0/1)
(11) Reset register (for PAGE0/1)
Bit symbol
Read/Write
After reset
Function
the example below. Ensure an interval of time between Clock/Alarm and
interrupt.
<DIS16HZ>
<DIS1HZ>
<DIS2HZ>
<DIS4HZ>
<DIS8HZ>
RSTALM
RSTTMR
1 Hz
0: Enabled
1: Disabled
0: Disabled
1: Enabled
INTENA
INTRTC
DIS1HZ
R/W
7
0
7
R/W
1
16 Hz
0: Enabled
1: Disabled
DIS16HZ
6
6
0
1
0
1
0
1
“0” is read.
TMP19A44 (rev1.3) 19-9
1: Clock
RSTTMR
Unused
Reset alarm register.
Unused
Reset clock register.
Enabled
Disabled
reset
5
5
ADJUST
PAGE
R/W
0
0: Don’t care
1: Adjust
Undefined
ADJUST
1: Alarm
RSTALM
reset
W
4
4
Clock
0: Disabled
1: Enabled
Always write
“0”.
0
1
0
1
ENATMR
3
R
0
3
−
Undefined
Selects Page0
Selects Page1
Don’t care
Adjusts sec. counter by setting this bit to “1”.
If it is set when the time elapsed is within 0 and
29, the sec. counter is cleared to “0”. If the
time elapsed is within 30 and 59, the min.
counter is carried and sec. counter is cleared
to "0". The ADJUST signal is output during 1
cycle of f
ADJUST state is released automatically
(PAGE0 only).
R/W
1: Disabled
ALARM
0: Disabled
1: Enabled
1 Hz
0: Enabled
ENAALM
DIS2HZ
2
SYS.
2
1
After being adjusted once, the
1: Disabled
“0” is read.
1 Hz
0: Enabled
TMP19A44
DIS4HZ
R/W
1
1
1
1: Disabled
PAGE
selection
2010-04-01
Undefined
1 Hz
0: Enabled
PAGE
DIS8HZ
R/W
0
0
1