tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 442

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Serial Bus Interface (SBI)
SCL
SDA
<PIN>
INTS0
interrupt request
16.6.3
At the end of a data word transfer, the INTS0 interrupt is generated to test <MST> to determine whether
the SBI is in the master or slave mode.
(Note)
Slave mode
In the slave mode, the SBI receives the start condition and a slave address.
After receiving the start condition from the master device, the SBI receives a slave address and a
direction bit from the master device during the first eight clocks on the SCL line. If the received
address matches its slave address specified at I2CAR or is equal to the general-call address, the
SBI pulls the SDA line to the "L" level during the ninth clock and outputs an acknowledgment
signal.
The INTS0 interrupt request is generated on the falling of the ninth clock, and <PIN> is cleared to
"0." In the slave mode, the SBI holds the SCL line at the "L" level while <PIN> is "0."
Master mode (<MST> = "1")
Test <TRX> to determine whether the SBI is configured as a transmitter or a receiver.
Transmitter mode (<TRX> = "1")
Test <LRB>. If <LRB> is "1," that means the receiver requires no further data. The master then
generates the stop condition as described later to stop transmission.
If <LRB> is "0," that means the receiver requires further data. If the next data to be transmitted
has eight bits, the data is written into SBIDBR. If the data has different length, <BC2:0> and
<ACK> are programmed and the transmit data is written into SBIDBR. Writing the data makes
<PIN> to"1," causing the SCL pin to generate a serial clock for transfer of a next data word, and
the SDA pin to transfer the data word. After the transfer is completed, the INTS0 interrupt request
is generated, <PIN> is set to "0," and the SCL pin is pulled to the "L" level. To transmit more data words, test
<LRB> again and repeat the above procedure.
Transferring a Data Word
Fig. 16.9 Generation of the Start Condition and a Slave Address
Start condition
The user can only use a DMA transfer:
• when there is only one master and only one slave and
• continuous transmission or reception is possible.
A6
1
A5
TMP19A44 (rev1.3) 16-18
2
A4
3
Slave address + Direction bit
A3
4
A2
5
A1
6
A0
7
TMP19A44
R/
W
8
Master to slave
Slave to master
ACK
2010-04-01
9
Acknowledgement
from slave