xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 178

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xrt94l33

Manufacturer Part Number
xrt94l33
Description
Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
Manufacturer
Exar Corporation
Datasheet

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XRT94L33
Rev.1.2.0.
Transmit ATM Cell Processor – Parity Error Count Register – Byte 3 (Address = 0xNF34)
Transmit ATM Cell Processor – Parity Error Count Register – Byte 2 (Address = 0xNF35)
Transmit ATM Cell Processor – Parity Error Count Register – Byte 3 (Address = 0xNF36)
Transmit ATM Cell Processor – Parity Error Count Register – Byte 3 (Address = 0xNF37)
2.2.6
Once a given ATM cell has successfully passed through the “Parity-Checker” block, or has been read out of
the “Transmit Cell Insertion” Memory buffer, it will now be processed by the “Transmit User Cell Filter” block.
Figure 22 presents the functional block diagram of the Transmit ATM Cell Processor block with the “Transmit
User Cell Filter” block highlighted.
B
RUR
B
RUR
B
RUR
B
RUR
IT
IT
IT
IT
0
0
0
0
7
7
7
7
T
HE
T
RANSMIT
B
RUR
B
RUR
B
RUR
B
RUR
IT
IT
IT
IT
0
0
0
0
6
6
6
6
U
SER
C
B
RUR
B
RUR
B
RUR
B
RUR
ELL
IT
IT
IT
IT
0
0
0
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
5
5
5
F
ILTER
Number of Parity Errors[31:24]
Number of Parity Errors[23:16]
Number of Parity Errors[15:8]
Number of Parity Errors[7:0]
B
LOCK
B
B
B
B
RUR
RUR
RUR
RUR
IT
IT
IT
IT
0
0
0
0
4
4
4
4
178
B
RUR
B
RUR
B
RUR
B
RUR
IT
IT
IT
IT
0
0
0
0
3
3
3
3
B
B
B
B
RUR
RUR
RUR
RUR
IT
IT
IT
IT
0
0
0
0
2
2
2
2
B
RUR
B
RUR
B
RUR
B
RUR
IT
IT
IT
IT
0
0
0
0
1
1
1
1
xr
B
RUR
B
RUR
B
RUR
B
RUR
IT
IT
IT
IT
0
0
0
0
0
0
0
0

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