xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 420
xrt94l33
Manufacturer Part Number
xrt94l33
Description
Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
Manufacturer
Exar Corporation
Datasheet
1.XRT94L33.pdf
(465 pages)
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XRT94L33
Rev.1.2.0.
Receive ATM Filter # 0, # 1, # 2, # 3 Pattern – Header Byte 2 (Address = 0xN745, 0xN755, 0xN765,
0xN775)
Receive ATM Filter # 0, # 1, # 2, # 3 Pattern – Header Byte 3 (Address = 0xN746, 0xN756, 0xN766,
0xN776)
Receive ATM Filter # 0, # 1, # 2, # 3 Pattern – Header Byte 4 (Address = 0xN747, 0xN757, 0xN767,
0xN777)
Note:
RECEIVE USER CELL FILTER – CHECK REGISTERS
The four User Cell Filter – Check Registers permit the user to specify which bits (within the Header bytes of
User Cells) will be checked and compared with the contents of the “User Cell Filter – Pattern Registers”.
There are four (4) “User Cell Filter-Check” Registers (one for each of the four header bytes within an ATM
cell). Setting a particular bit-field to “0” configures the “Receive User Cell Filter” to NOT compare the
corresponding bit-field (within the header bytes of the incoming user cell) to the corresponding bit-value,
within the User Cell Filter – Pattern Register; during User Cell pattern checking. Conversely, setting a
particular bit-field to “1” configures the “Receive User Cell Filter” to compare the corresponding bit-field (within
the header bytes of the incoming user cell) to the corresponding bit-value, within the User Cell Filter – Pattern
Register; during User Cell pattern checking.
For example, if the user were write the value “0x00” into a given “User Cell Filter – Check Register”, then the
Receive User Cell Filter will NOT check and compare the value of the corresponding header byte, within an
incoming User Cell; to the contents of the corresponding “User Cell Filter – Pattern” register during User Cell
pattern checking. Conversely, if the user were to write the value “0xFF” into a given “User Cell Filter – Check
Register”, then the User Cell Filter will check and compare all eight bits (within the corresponding byte) within
an incoming User Cell; to the contents of the corresponding “User Cell Filter – Pattern” register during User
Cell pattern checking.
The bit-format of the four “User Cell Filter – Check Registers” is presented below.
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
7
7
7
Each of the four Receive User Cell Filters (within the Receive ATM Cell Processor block) contains their own set
of “User Cell Filter – Pattern” registers.
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
6
6
6
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
5
5
User Cell Filter Pattern – Header Byte 2[7:0]
User Cell Filter Pattern – Header Byte 3[7:0]
User Cell Filter Pattern – Header Byte 4[7:0]
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
4
4
4
420
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
3
3
3
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
2
2
2
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
1
1
1
xr
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
0
0
0
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