xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 195

• Manufacturer Part Number: xrt94l33
• Description: Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
• Manufacturer: Exar Corporation

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
STEP 1a – Write a “0” into Bit 4 (Extraction Memory RESET*) within the “Transmit ATM Cell – Memory
Control” Register; as depicted below.
Transmit ATM Cell – Memory Control Register (Address = 0xNF13)
STEP 1b – Write a “1” into Bit 4 (Extraction Memory RESET*), within the “Transmit ATM Cell – Memory
Control” Register; as depicted below.
Transmit ATM Cell – Memory Control Register (Address = 0xNF13)
Note:
STEP 2 – Check and see if an ATM cell exists in the “Transmit Cell Extraction Buffer”
This can be accomplished by one of two approaches.
• Polling approach
• Interrupt-driven approach
Each of these approaches is described below.
Executing STEP 2 using the Polling Approach
The user can determine whether or not a cell is available, within the “Transmit Cell Extraction Buffer” by
testing the state of Bit 3 (Extraction Memory CLAV) within the Transmit ATM Cell – Memory Control Register;
as depicted below.
Transmit ATM Cell – Memory Control Register (Address = 0xNF13)
If Bit 3 is set to “1”, then the “Transmit Cell Extraction Buffer” contains an ATM cell that needs to be read. At
this point, the user should proceed on to STEP 3.
B
B
B
R/O
R/O
R/O
IT
IT
IT
0
0
0
7
7
7
This step should typically be performed upon power-up, prior to processing any ATM cell traffic through the
XRT94L33. This step is not necessary after the first cell has been read from the “Transmit Cell Extraction
Buffer” following a power cycle to the chip.
Unused
Unused
Unused
B
B
B
R/O
R/O
R/O
IT
IT
IT
0
0
0
6
6
6
B
B
B
R/O
R/O
R/O
IT
IT
IT
0
0
0
5
5
5
Extraction
Extraction
Extraction
RESET*
RESET*
RESET*
Memory
Memory
Memory
B
B
B
1->0
0->1
R/W
R/W
R/W
IT
IT
IT
1
4
4
4
195
Extraction
Extraction
Extraction
Memory
Memory
Memory
CLAV
CLAV
CLAV
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
0
0
3
3
3
Insertion
Insertion
Insertion
RESET*
RESET*
RESET*
Memory
Memory
Memory
B
B
B
R/W
R/W
R/W
IT
IT
IT
1
1
1
2
2
2
Insertion
Insertion
Insertion
Memory
Memory
Memory
ROOM
ROOM
ROOM
B
B
B
R/W
R/W
R/W
IT
IT
IT
1
1
1
1
1
1
XRT94L33
Write SoC
Write SoC
Write SoC
Insertion
Insertion
Insertion
Memory
Memory
Memory
Rev.1.2.0.
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
0
0
0