xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 451

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xrt94l33

Manufacturer Part Number
xrt94l33
Description
Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
Manufacturer
Exar Corporation
Datasheet

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xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Figure 116 Timing Diagram of various Receive UTOPIA Interface block signals, when the Receive
UTOPIA Interface block is operating in the “Cell Level Handshaking” Mode
Notes regarding Figure 116:
The Receive UTOPIA Data bus is configured to be 16 bits wide. Hence, the data, which the Receive UTOPIA places on
The Receive UTOPIA Interface block is configured to handle 54 bytes/cell. Hence, Figure 86 illustrates the ATM Layer
Figure 116, the ATM Layer processor is just finishing up its reading of an ATM cell. Prior to clock edge #2,
the RxFIFO does not contain enough ATM cell data to make up at least one cell. Hence, the Receive
RxData[15:0]
RxEnB*
the Receive UTOPIA Data bus, is expressed in terms of 16 bit words: W0 - W26.
processor reading in 27 words (W0 through W26) for each ATM cell.
RxClav
RxSoC
RxClk
Check the level of the RxClav pin.
No
W24
1
(word) of a new
the first byte
W25
START
“High”?
RxClav
Is this
cell?
2
Is
No
Yes
W26
3
Yes
4
5
READING IN THE FIRST BYTE/WORD
Assert the Receive Utopia Interface block
Output Enable input pin - RxEnB*.
Perform the following, concurrently
Read in the next byte (word) from the
Receive Utopia Data Bus
Read in the odd-parity value of this byte
(word) from the RxPry output pin.
Assert the “Receive Utopia Data Bus Output
Enable input pin - RxEnB*.
Check and verify that the RxSoC pin is
asserted.
Read in the first byte (word) from the
Receive Utopia Data Bus.
Read in the odd-parity value of this byte/
word from the RxPry output pin.
Perform the following, concurrently
No
READING IN THE REMAINING
BYTES/WORDS OF A CELL
6
451
current Cell
Complete?
W0
OF A CELL
Is the
7
W1
8
Yes
W2
9
31
W25
anymore Cells
32
No
Is there
to read
END
?
W26
34
XRT94L33
Yes
Rev.1.2.0.

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