xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 377

• Manufacturer Part Number: xrt94l33
• Description: Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
• Manufacturer: Exar Corporation

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Specifying the “SF Clear Interval” of Time
Likewise, the user can specify the “SF Clear Interval” period by writing the appropriate value into the “Receive
STS-3 Transport – Receive SF Clear Monitor Interval – Byte 2, 1, and 0” registers, as depicted below.
Receive STS-3 Transport – Receive SF Clear Monitor Interval – Byte 2 (Address = 0x115D)
Receive STS-3 Transport – Receive SF Clear Monitor Interval – Byte 1 (Address = 0x115E)
Receive STS-3 Transport – Receive SF Clear Monitor Interval – Byte 0 (Address = 0x115F)
Notes:
Example of Defining the SF Clearance Criteria
Suppose that the user writes in the value “0x0008” into the “Receive STS-3c Transport – Receive SF Clear
Threshold” Registers; as depicted below.
Receive STS-3 Transport – Receive SF CLEAR Threshold – Byte 1 (Address = 0x113A)
Receive STS-3 Transport – Receive SF CLEAR Threshold – Byte 0 (Address = 0x113B)
The “Receive STS-3 Transport – Receive SF Clear Monitor Interval – Byte 2, Byte 1 and Byte 0” registers permit the user
The actual length of time that the Receive STS-3 TOH Processor block will use (to accumulate B2 errors) to declare the
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
to write in a 24-bit expression for the “SF Clear Interval”. The number that is written into these registers represents
the duration of the “SF Clear Interval” period, in terms of SONET frame periods.
SF condition is eight times the value written into these registers.
IT
IT
IT
IT
IT
1
1
1
0
0
7
7
7
7
7
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
0
0
6
6
6
6
6
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
0
0
5
5
5
5
5
SF_CLEAR_MONITOR_WINDOW[23:16]
SF_CLEAR_MONITOR_WINDOW[15:8]
SF_CLEAR_MONITOR_WINDOW[7:0]
SF_CLEAR_THRESHOLD[15:8]
SF_CLEAR_THRESHOLD[7:0]
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
0
0
4
4
4
4
4
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B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
0
1
3
3
3
3
3
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
0
0
2
2
2
2
2
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
0
0
1
1
1
1
1
XRT94L33
Rev.1.2.0.
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
0
0
0
0
0
0
0