xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 20

• Manufacturer Part Number: xrt94l33
• Description: Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
• Manufacturer: Exar Corporation

XRT94L33
Rev.1.2.0.
AB3
W1
RxD_ALARM/
RxAPSPAR
RxD_DP
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
I/O
I
I
CMOS
TTL/
TTL
TTL
Receive STS-3/STM-1 Telecom Bus Interface – Parity Input
pin:
This input pin can be configured to function as one of the
following.
The EVEN or ODD parity value of the bits which are input via the
“RXD_D[7:0]” input pins.
The EVEN or ODD parity value of the bits which are being input
via the “RXD_D[7:0]” input and the states of the “RXD_PL” and
“RXD_C1J1” input pins.
Notes:
1.
2.
Receive STS-3/STM-1 Telecom Bus Interface – Alarm
Indicator Input:
This input pin pulses “high” coincident to whether the Receive
STS-3/STM-1 Telecom Bus Interface block is receiving a byte
(via the “RxD_D[7:0] input pins) that is a part of any STS-1 or
STS-3c signal that is carrying the AIS-P indicator.
Note:
RxAPSParity – Receive Payload APS Bus Interface – Parity
Input/Output Pin:
This pin can only be configured to operate in this role if the
XRT94L33 has been configured to operate in either the “ATM
UNI” or “PPP over STS-3c” Mode.
20
The user can make any one of these configuration
selections by writing the appropriate value into the “Telecom
Bus Control” register (Address Location = 0x0137).
The user should connect this pin to GND if the STS-3/STM-
1 Telecom Bus Interface is disabled.
If the RxD_ALARM input signal pulses “HIGH” for any
given STS-1 signal (within the “incoming” STS-3), then
the corresponding Receive SONET POH Processor
block will automatically declare the AIS-P defect
condition.
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