xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 429

• Manufacturer Part Number: xrt94l33
• Description: Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
• Manufacturer: Exar Corporation

xr
XRT94L33
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Rev.1.2.0.
Header Bytes (4 Bytes)
HEC Byte (1 Byte)
User Defined Field (3 Bytes)
Cell Payload Bytes (48 Bytes)
As a consequence, the user must write in a total of 14 “32-bit words” into the “Receive Cell Insertion” buffer
for each ATM cell that is written into the “Receive Cell Insertion” Buffer.
Procedure for Writing a Cell into the “Receive Cell Insertion Buffer”
The user can write an ATM cell into the “Receive Cell Insertion Buffer” within the Receive ATM Cell Processor
block, by executing the following steps.
STEP 1 – Flush the contents of the “Receive Cell Insertion Buffer”
This is accomplished by executing a “Receive Cell Insertion Buffer” RESET. The user can perform this
“Transmit Cell Insertion Buffer” RESET by doing the following.
STEP 1a – Write a “0” into Bit 2 (Insertion Memory RESET*), within the “Receive ATM Cell – Memory
Control” register; as depicted below.
Receive ATM Cell – Memory Control Register (Address = 0xN713)
B
7
B
6
B
5
B
4
B
3
B
2
B
1
B
0
IT
IT
IT
IT
IT
IT
IT
IT
Unused
Extraction
Extraction
Insertion
Insertion
Insertion
Memory
Memory
Memory
Memory
Memory
RESET*
CLAV
RESET*
ROOM
Write SoC
R/O
R/O
R/O
R/W
R/W
R/W
R/W
R/W
0
0
0
1
0
1->0
1
0
STEP 1b – Write a “1” into Bit 2 (Insertion Memory RESET*), within the “Receive ATM Cell – Memory
Control” Register; as depicted below.
Receive ATM Cell – Memory Control Register (Address = 0xN713)
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