xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 462

• Manufacturer Part Number: xrt94l33
• Description: Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
• Manufacturer: Exar Corporation

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XRT94L33
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Rev.1.2.0.
#4. Afterwards, the ATM Layer will cease to read any more cell data from UNI #1, and will begin to read
some cell data from UNI #2 (RxUAddr[4:0] = 0x03). The ATM Layer processor will indicates its intention to
select a new UNI device for reading by negating the RxEnB* signal, at clock edge #5 (see the shaded portion
of Figure 120). At this time, UNI #1 will notice two things:
1. The UTOPIA Address for the Receive UTOPIA Interface block, within UNI #1 is on the Receive UTOPIA
Address bus (RxUAddr[4:0] = 0x01).
2. The RxUEnB* signal has been negated.
UNI #1 will interpret this signaling as an indication that the ATM Layer processor is going to be performing
read operations from it. Afterwards, the ATM Layer processor will begin to read ATM cell data from the
Receive UTOPIA Interface block, within UNI #1.
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