xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 364

• Manufacturer Part Number: xrt94l33
• Description: Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
• Manufacturer: Exar Corporation

XRT94L33
Rev.1.2.0.
Receive STS-3 Transport – Receive SD Set Monitor Interval – Byte 1 (Address = 0x113E)
Receive STS-3 Transport – Receive SD Set Monitor Interval – Byte 0 (Address = 0x113F)
Note:
Example of Defining the SD Declaration Criteria
Suppose that the user writes in the value “0x000F” into the “Receive STS-3 Transport – Receive SD Set
Threshold” Registers; as depicted below.
Receive STS-3 Transport – Receive SD SET Threshold – Byte 1 (Address = 0x1142)
Receive STS-3 Transport – Receive SD SET Threshold – Byte 0 (Address = 0x1143)
Additionally, now suppose that the user writes in the value “0x000010” into the “Receive STS-3 Transport –
Receive SD Set Monitor Interval” Registers; as depicted below.
Receive STS-3 Transport – Receive SD Set Monitor Interval – Byte 2 (Address = 0x113D)
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
0
7
7
7
7
7
The “Receive STS-3 Transport – Receive SD Set Monitor Interval – Byte 2, Byte 1 and Byte 0” registers permit
the user to write in a 24-bit expression for the “SD Defect Declare Monitor Time” period. The number that is
written into these registers represents the duration of the “SD Defect Declare Monitor Time” period, in terms of 1
millisecond units.
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
0
6
6
6
6
6
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
5
5
5
5
SD_SET_MONITOR_WINDOW[23:16]
SD_SET_MONITOR_WINDOW[15:8]
SD_SET_MONITOR_WINDOW[7:0]
SD_SET_THRESHOLD[15:8]
SD_SET_THRESHOLD[7:0]
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
0
4
4
4
4
4
364
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
1
0
3
3
3
3
3
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
1
0
2
2
2
2
2
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
1
0
1
1
1
1
1
xr
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
1
0
0
0
0
0
0