xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 201

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xrt94l33

Manufacturer Part Number
xrt94l33
Description
Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
Manufacturer
Exar Corporation
Datasheet

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xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Figure 30: Behavior of TxGFC, TxGFCClk, and TxGFCMSB during GFC insertion into the “Outbound”
2.2.6.12
The Transmit ATM Cell Processor block consists of a “HEC Byte Calculation and Insertion” block. Figure 31
presents the functional block diagram of the “Transmit ATM Cell Processor” block with the “HEC Byte
Calculation and Insertion” block highlighted.
Figure 31: Illustration of the Transmit ATM Cell Processor block Functional Block Diagram with the
HEC Byte Calculator and Insertion” block highlighted
TxGFCMSB
TxGFCClk
TxGFC
Transmit UTOPIA
T
Interface Block
HE
TxFIFO
TxFIFO
HEC B
Main Data Path
YTE
t14
t13
C
t15
ALCULATION AND
t16
BIT 3
Generator
Checker
Generator
Checker
Parity
Idle Cell
Block
Parity
Idle Cell
Block
t17
I
NSERTION
BIT 2
User Cell
Calculation
HEC Byte
User Cell
Calculation
Insertion
HEC Byte
Filter
Block
Insertion
201
Filter
Block
Block
Block
&
&
B
LOCK
BIT 1
Cell Extraction
Cell Insertion
Cell Extraction
Transmit GFC
Cell Insertion
Cell Payload
Processor
Transmit GFC
Processor
Nibble-Field
Cell Payload
Scrambler
Processor
Processor
Nibble-Field
Buffer/
Buffer/
Input Port
Scrambler
Buffer/
Buffer/
Input Port
Block
Block
Block
Block
BIT 0
Microprocessor
Microprocessor
Processor Block
SONET/STS-3c
To Transmit
Input Port
Interface
Interface
TxGFC
Block
Block
POH
XRT94L33
Rev.1.2.0.

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