xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 369

• Manufacturer Part Number: xrt94l33
• Description: Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
• Manufacturer: Exar Corporation

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Receive STS-3 Transport – Receive SD CLEAR Threshold – Byte 1 (Address = 0x1146)
Receive STS-3 Transport – Receive SD CLEAR Threshold – Byte 0 (Address = 0x1147)
Notes:
The “Receive STS-3 Transport – Receive SD Clear Threshold – Byte 1 and Byte 0” registers permits the user to write in a
The “default” value for the “SD Defect Clear B2 Error Threshold” is “0xFFFF”.
Specifying the length of the “SD Defect Clear Monitor” period of Time
Likewise, the user can also specify the “SD Defect Clear Interval” period by writing the appropriate value into
the “Receive STS-3 Transport – Receive SD Clear Monitor Interval – Byte 2, 1, and 0” registers, as depicted
below.
Receive STS-3 Transport – Receive SD Clear Monitor Interval – Byte 2 (Address = 0x1159)
Receive STS-3 Transport – Receive SD Clear Monitor Interval – Byte 1 (Address = 0x115A)
Receive STS-3 Transport – Receive SD Clear Monitor Interval – Byte 0 (Address = 0x115B)
Note:
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
16-bit expression for the “SD Defect Clear B2 Error Threshold”.
IT
IT
IT
IT
IT
1
1
1
1
1
7
7
7
7
7
The “Receive STS-3 Transport – Receive SD Clear Monitor Interval – Byte 2, Byte 1 and Byte 0” registers permit
the user to write in a 24-bit expression for the length of the “SD Defect Clear Monitor period”. The number that
is written into these registers represents the duration of the “SD Clear Interval” period, in terms one millisecond
units.
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
1
1
6
6
6
6
6
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
1
1
5
5
5
5
5
SD_CLEAR_MONITOR_WINDOW[23:16]
SD_CLEAR_MONITOR_WINDOW[15:8]
SD_CLEAR_MONITOR_WINDOW[7:0]
SD_CLEAR_THRESHOLD[15:8]
SD_CLEAR_THRESHOLD[7:0]
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
1
1
4
4
4
4
4
369
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
1
1
3
3
3
3
3
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
1
1
2
2
2
2
2
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
1
1
1
1
1
1
1
XRT94L33
Rev.1.2.0.
B
B
B
B
B
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
1
1
1
1
1
0
0
0
0
0