xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 59
xrt94l33
Manufacturer Part Number
xrt94l33
Description
Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
Manufacturer
Exar Corporation
Datasheet
1.XRT94L33.pdf
(465 pages)
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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
B13
C13
TXHDLCDAT_0_0
TXHDLCDAT_1_0
STS1TXA_D0_0
STS1TXA_D1_0
TXGFCMSB_0
TXGFC_0
I/O
I
TTL/CMOS
TTL
Transmit STS-1 Telecom Bus – Channel 0 – Input Data
Bus pin number 0
The exact function of this pin depends upon whether the STS-
1 Telecom Bus Interface, associated with Channel 0 is
enabled or not.
If STS-1 Telecom Bus (Channel 0) has been enabled –
STS-1 Transmit Telecom Bus – Input Data Bus pin number 0:
This input pin along with “STS1TXA_D_0[7:1]” function as the
“STS-1 Transmit (Add) Telecom Bus – Input Data Bus for
Channel 0.
(Least Significant Bit) input pin on the Transmit (Add) Telecom
Bus – Input Data Bus. The STS-1 Telecom Bus interface will
sample and latch this pin upon the falling edge of
“STS1TXA_CK_0”.
The LSB of any byte, which is being input into the “STS-1
Transmit Telecom Bus – Data Bus (for Channel 0) should be
input via this pin.
TXHDLCDAT_0_0 (Transmit HDLC block data – Channel 0
– Input data pin 0)
If Channel 0 has been configured to operate in the “High-
Speed HDLC Controller” Mode, then the System-Side
Terminal Equipment will be provided with a “byte-wide”
Transmit HDLC Controller byte-wide
TXGFCMSB_0 (Transmit GFC MSB Indicator – Channel 0)
– ATM Applications ONLY.
This pin only functions in this particular role if the XRT94L33
has been configured to operate in the ATM UNI Mode.
Transmit STS-1 Telecom Bus – Channel 0 – Input Data
Bus pin number 1:
The exact function of this pin depends upon whether the STS-
1 Telecom Bus Interface, associated with Channel 0 is
enabled or not.
If STS-1 Telecom Bus (Channel 0) has been enabled –
STS-1 Transmit Telecom Bus – Input Data Bus pin number 1:
This
“STS1TXA_D0_0 function as the “STS-1 Transmit (Add)
Telecom Bus – Input Data Bus for Channel 0. The STS-1
Telecom Bus interface will sample and latch this pin upon the
falling edge of “STS1TXA_CK_0”.
TXHDLCDAT_1_0 (Transmit HDLC block data – Channel 0
– Input data pin 1)
TXGFC_0 (Transmit GFC data – Channel 0)
59
input
This particular input pin functions as the LSB
pin
along
with
“STS1TXA_D_0[7:2]”
XRT94L33
Rev.1.2.0.
and
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