HD6433045 HITACHI [Hitachi Semiconductor], HD6433045 Datasheet - Page 148

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HD6433045

Manufacturer Part Number
HD6433045
Description
Hitachi Single-Chip Microcomputer
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Wait Mode in Areas Where Wait-State Controller is Disabled
External three-state access areas in which the wait-state controller is disabled (ASTn = 1, WCEn =
0) operate in pin wait mode 0. The other wait modes are unavailable. The settings of bits WMS1
and WMS0 are ignored in these areas.
Pin Wait Mode 0: Wait states can only be inserted by WAIT pin control. During access to an
external three-state-access area, if the WAIT pin is low at the fall of the system clock (ø) in the T
state, a wait state (T
inserted until the WAIT signal goes high. Figure 6-12 shows the timing.
Read
access
Write
access
Note:
*
Arrows indicate time of sampling of the
ø
WAIT
Address bus
AS
RD
Data bus
HWR
Data bus
, LWR
pin
W
) is inserted. If the WAIT pin remains low, wait states continue to be
T
1
Figure 6-12 Pin Wait Mode 0
T
WAIT
2
*
134
pin.
External address
Inserted by
Write data
T
W
*
WAIT
T
signal
W
*
Read data
T
3
2

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