HD6433045 HITACHI [Hitachi Semiconductor], HD6433045 Datasheet - Page 218
HD6433045
Manufacturer Part Number
HD6433045
Description
Hitachi Single-Chip Microcomputer
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6433045.pdf
(867 pages)
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Bits 2 to 0—Data Transfer Select 2B to 0B (DTS2B, DTS1B, DTS0B): These bits select the
data transfer activation source. The selectable activation sources differ between normal mode and
block transfer mode.
Normal mode
Bit 2
DTS2B
0
1
Block transfer mode
Bit 2
DTS2B DTS1B DTS0B Description
0
1
The same internal interrupt can be selected to activate two or more channels. The channels are
activated in a priority order, highest priority first. For the priority order, see section 8.4.9, DMAC
Multiple-Channel Operation.
Bit 1
0
1
0
1
Bit 1
DTS1B
0
1
0
1
Bit 0
0
1
0
1
0
1
0
1
Bit 0
DTS0B
0
1
0
1
0
1
0
1
Compare match/input capture A interrupt from ITU channel 0 (Initial value)
Compare match/input capture A interrupt from ITU channel 1
Compare match/input capture A interrupt from ITU channel 2
Compare match/input capture A interrupt from ITU channel 3
Cannot be used
Cannot be used
Falling edge of DREQ
Cannot be used
Description
Auto-request (burst mode)
Cannot be used
Auto-request (cycle-steal mode)
Cannot be used
Cannot be used
Cannot be used
Falling edge of DREQ
Low level input at DREQ
204
(Initial value)
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