HD6433045 HITACHI [Hitachi Semiconductor], HD6433045 Datasheet - Page 230
HD6433045
Manufacturer Part Number
HD6433045
Description
Hitachi Single-Chip Microcomputer
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6433045.pdf
(867 pages)
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Transfers can be requested (activated) by an external request or auto-request. An auto-requested
transfer is activated by the register settings alone. The designated number of transfers are executed
automatically. Either cycle-steal or burst mode can be selected. In cycle-steal mode the DMAC
releases the bus temporarily after each transfer. In burst mode the DMAC keeps the bus until the
transfers are completed, unless there is a bus request from a higher-priority bus master.
For the detailed settings see section 8.3.4, Data Transfer Control Registers (DTCR).
Address T
Address B
Legend
L
L
N
T
B
T
B
A
B
A
A
B
B
= initial setting of MARA
= initial setting of MARB
= initial setting of ETCRA
= L
= L + SAIDE • (–1)
= L
= L + DAIDE • (–1)
A
A
B
B
A
A
SAID
DAID
• (2
• (2
Figure 8-8 Operation in Normal Mode
DTSZ
DTSZ
• N – 1)
• N – 1)
Transfer
216
Address T
Address B
B
B
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