MT90520AG ZARLINK [Zarlink Semiconductor Inc], MT90520AG Datasheet - Page 126

• Manufacturer Part Number: MT90520AG
• Description: 8-Port Primary Rate Circuit Emulation AAL1 SAR
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Address: 2026 (Hex)
Label: DRWPR
Reset Value: 0000 (Hex)
Note: The write pointer value is cleared to “00h” upon start-up and each time that the DRENB bit is cleared (i.e., when the Data RX_SAR is
disabled, the write pointer is automatically cleared to “00h”).
Address: 2024 (Hex)
Label: DRCON
Reset Value: 0000 (Hex)
Reserved
Reserved
DRWP
DRBASE
DRSIZE
Label
Label
Bit Position
Position
15:7
6:0
15:13
12:2
Bit
1:0
Table 47 - Data RX_SAR Configuration Register
Table 48 - Data RX_SAR Write Pointer Register
Type
Type
R/O
R/O
R/W
R/W
R/O
Data RX_SAR Cell Buffer Size.
This field indicates the number of non-CBR data cells which can be held in the Data
RX_SAR’s Cell Buffer:
“00” = 16 cells
“01” = 32 cells
“10” = 64 cells
“11” = 128 cells.
Data RX_SAR Cell Buffer Base Address.
Represents address bits <19:9> that point to the word address of the first structure in the
cell buffer in external memory. The lower address bits <8:0> of the pointer are preset to
“0_0000_0000”.
Cell buffers must start on boundaries corresponding to the size of the buffer (e.g.,
32-cell buffers must start on boundaries which are integer multiples of 32 cells * 32
words/cell). As a result, in some cases, DRBASE<2:0> (bits<11:9> of the actual address)
must to be set to ‘0’, depending on the number of cells allocated in the cell buffer:
16-cell buffer: no restrictions
32-cell buffer: DRBASE<0> must equal ‘0’ (buffers start on 1024-word boundaries)
64-cell buffer: DRBASE<1:0> must equal “00” (buffers start on 2048-word boundaries)
128-cell buffer: DRBASE<2:0> must equal “000” (buffers start on 4096-word
boundaries).
Always reads “000”.
Data RX_SAR Cell Buffer Write Pointer.
Indicates the cell structure number which is currently being written by the Data RX_SAR
(the cell is not yet valid). This value is incremented at the end of each cell-write procedure
(indicates the next cell location to be written). Allowable values:
0h -> Fh (16-cell buffer)
0h -> 1Fh (32-cell buffer)
0h -> 3Fh (64-cell buffer)
0h -> 7Fh (128-cell buffer).
Always reads “0000_0000_0”.
Zarlink Semiconductor Inc.
MT90520
126
Description
Description
Data Sheet