MT90520AG ZARLINK [Zarlink Semiconductor Inc], MT90520AG Datasheet - Page 41

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MT90520AG

Manufacturer Part Number
MT90520AG
Description
8-Port Primary Rate Circuit Emulation AAL1 SAR
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet

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4.3
The TDM Interface module of the MT90520 device is designed to interface to a time division multiplexed backplane
bus, to external framers, and to external line interface units (LIUs). Thus, the TDM module can interface with buses
which carry Nx64 kbps data or bit stream data. The TDM module is responsible for performing Structured Data
Transfer with and without CAS, and Unstructured Data Transfer, as required to meet the CES specification, af-vtoa-
0078.000.
MT90520
TDM Interface Module
SDT RX_SAR
UDT RX_SAR
TX_SAR
SDT Segmentation Circular Buffers
- each channel has its own buffers
Figure 10 - Data Flow Through the TDM Module (1 port)
& SDT Reassembly Circular
UDT Reassembly
Internal Memory
Circular Buffers
- one buffer per
External Memory
port
Buffers
Zarlink Semiconductor Inc.
MT90520
Per-Port TDM Interface Module
Clock Management Module
41
Buffer
Output
Buffer
TDM
Input
TDM
UDT mode
SDT mode
Data Sheet
DSTi
CSTi/LOSi
STiCLK
STiMF
DSTo
CSTo/LOSo
SToCLK
SToMF
C4M/C2M
F0

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