MT90520AG ZARLINK [Zarlink Semiconductor Inc], MT90520AG Datasheet - Page 70

• Manufacturer Part Number: MT90520AG
• Description: 8-Port Primary Rate Circuit Emulation AAL1 SAR
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Figure 28 - Reassembly Control Structure - SDT Format
Note 1: Fields which appear in dark grey are reserved fields which
must be cleared by software upon initialization.
Note 2: Fields which appear in light grey are those which are
updated by hardware.
Note 3: SDT Reassembly Control Structures must always start on
16-word (32-byte) boundaries.
+11A
Byte
+114
+116
+118
+0E
Add
+0A
+0C
+1A
+1C
+1E
+00
+02
+04
+06
+08
+10
+12
+14
+16
+18
+20
15
R
V_RTS
PV_SN
C
D
V
<3:1>
<2:0>
Pointer Parity Errors
CAS
CAS124
CAS125
CAS126
CAS127
Misinserted Cells
14
CAS0
CAS1
CAS2
Buffer Overflows
A S
P
AAL1 Sequence
Res
13
P
First Entry
i
Maximum Lead
Res
Errors
12
M
Zarlink Semiconductor Inc.
<3:1>
I
RTS
BS
11
Current
Minimum Structure
Size - 30 bytes (1
channel)
Maximum Structure
Size - 284 bytes (128
channels)
Frame
10
Reassembled Cells
MT90520
SDT RX_SAR Write Pointer
C
c
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
P
9
o
Res
Last
Seq
Location in Structure
R
o
8
Structure Length
70
Base Address
Base Address
Base Address
Base Address
Base Address
Base Address
Base Address
R
7
o
AAL1 Header Errors
6
R
Pointer Reframes
o
Buffer Underruns
Good
Current Entry
Last
5
R
T
o
Lost Cells
Last Entry
Res
Number of
Channels
R
4
o
Fast State
R
o
3
VC TDM
R
2
o
Port
R
1
o
0
R
o
Word
Add
+0A
+0B
+0C
+0D
+0E
+0F
+8A
+8B
+8C
+8D
+00
+01
+02
+03
+04
+05
+06
+07
+08
+09
+10
Data Sheet