MT90520AG ZARLINK [Zarlink Semiconductor Inc], MT90520AG Datasheet - Page 162

• Manufacturer Part Number: MT90520AG
• Description: 8-Port Primary Rate Circuit Emulation AAL1 SAR
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

UTO_OUT_CLK Period
UTO_OUT_CLK Pulse Width (HIGH / LOW)
Input Setup Time -
UTO_OUT_CLAVATM_ENBPHY VALID to
UTO_OUT_CLK rising
Input Hold Time - UTO_OUT_CLK rising to
UTO_OUT_CLAVATM_ENBPHY de-asserted
Output Delay - UTO_OUT_CLK rising to
(UTO_OUT_DATA[7:0] VALID and
UTO_OUT_ENBATM_CLAVPHY and
UTO_OUT_SOC asserted)
Output Hold Time - UTO_OUT_CLK rising to
(UTO_OUT_DATA[7:0] INVALID and
UTO_OUT_ENBATM_CLAVPHY and
UTO_OUT_SOC de-asserted)
UTO_IN_CLK
UTO_IN_CLAV
ATM_ENBPHY
UTO_IN_ENBATM
_CLAVPHY
UTO_IN_SOC
UTO_IN_DATA[7:0]
Table 99 - UTOPIA Level 1 Interface Timing - ATM mode - Outgoing Data (UTOPIA TX Bus)
Characteristic
t
URXIS
t
URX1P
Figure 61 - TDM Bus Outputs - Serial Output Timing
t
URXD
t
URXIS
t
UTX1H/L
t
t
t
t
t
t
Sym.
UTX1P
UTXIH
UTXIS
URXIH
UTXD
UTXH
H1
Zarlink Semiconductor Inc.
MT90520
19.23
Min.
7.7
4
1
1
162
t
UTX1P
Typ.
/2
P47
Max.
13.8
t
URXH
t
URXIH
t
URX1L
Units
P48
ns
ns
ns
ns
ns
s
t
URX1H
UTO_OUT_CLK = 52 MHz
C
C
L
L
= 20 pF; UTO_OUT_CLK < 52 MHz
= 20 pF; UTO_OUT_CLK < 52 MHz
Test Conditions
H1
Data Sheet
V
V
V
V
V
TT
TT
TT
TT
TT