OM11077 NXP Semiconductors, OM11077 Datasheet - Page 107
OM11077
Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Specifications of OM11077
Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
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8. MAM usage notes
UM10237_4
User manual
Fig 21. Block diagram of the Memory Accelerator Module
ADDR
[18:4]
EQPREF
MUX
=
ADDR
LA[3:2]
ENAL0
cclk
INCREMENTOR
ENP
When changing MAM timing, the MAM must first be turned off by writing a zero to
MAMCR. A new value may then be written to MAMTIM. Finally, the MAM may be turned
on again by writing a value (1 or 2) corresponding to the desired operating mode to
MAMCR.
For a system clock slower than 20 MHz, MAMTIM can be 001. For a system clock
between 20 MHz and 40 MHz, flash access time is suggested to be 2 CCLKs, while in
systems with a system clock faster than 40 MHz, 3 CCLKs are proposed. For system
clocks of 60 MHz and above, 4CCLK’s are needed.
D
EN
EQA0
PREFETCH LATCH
=
PREFETCH MUX
Q
128
32
xFFE0
0FFF0
30000
20000
10000
00020
00010
00000
Rev. 04 — 26 August 2009
EQBT
=
xFFE4
0FFF4
30004
20004
10004
00024
00014
00004
ADDR
Chapter 6: LPC24XX Memory Accelerator Module (MAM)
128
xFFE8
0FFF8
30008
20008
10008
00028
00018
00008
ENBT
DI[31:0] (to ARM core)
FINAL MUX
BT LATCH
xFFEC
3000C
2000C
1000C
0FFFC
0002C
0001C
0000C
128
BT MUX
32
EQD
=
ADDR
UM10237
END
© NXP B.V. 2009. All rights reserved.
DATA LATCH
DATA MUX
128
32
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