OM11077 NXP Semiconductors, OM11077 Datasheet - Page 28

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

NXP Semiconductors
UM10237_4
User manual
3.1.1 Register description
3.1.2 External Interrupt flag register (EXTINT - 0xE01F C140)
3.1 External interrupt inputs
Table 23.
[1]
The LPC2400 includes four External Interrupt Inputs as selectable pin functions. In
addition, external interrupts have the ability to wake up the CPU from Power-down mode.
This is controlled by the register INTWAKE, which is described in the Clocking and Power
Control chapter under the Power Control heading
The external interrupt function has four registers associated with it. The EXTINT register
contains the interrupt flags. The EXTMODE and EXTPOLAR registers specify the level
and edge sensitivity parameters.
Table 24.
[1]
When a pin is selected for its external interrupt function, the level or edge on that pin
(selected by its bits in the EXTPOLAR and EXTMODE registers) will set its interrupt flag in
this register. This asserts the corresponding interrupt request to the VIC, which will cause
an interrupt if interrupts from the pin are enabled.
Writing ones to bits EINT0 through EINT3 in EXTINT register clears the corresponding
bits. In level-sensitive mode the interrupt is cleared only when the pin is in its inactive
state.
Name
Reset
RSID
AHB priority scheduling registers
AHBCFG1
AHBCFG2
Syscon miscellaneous registers
SCS
Name
EXTINT
EXTMODE
EXTPOLAR
Reset Value reflects the data stored in used bits only. It does not include reserved bits content.
Reset Value reflects the data stored in used bits only. It does not include reserved bits content.
Summary of system control registers
External Interrupt registers
Description
The External Interrupt Flag Register contains
interrupt flags for EINT0, EINT1, EINT2 and
EINT3. See
The External Interrupt Mode Register controls
whether each pin is edge- or level-sensitive.
See
The External Interrupt Polarity Register controls
which level or edge on each pin will cause an
interrupt. See
Description
Reset Source Identification
Register
Configures the AHB1 arbiter
Configures the AHB2 arbiter
System Control and Status
Table
Rev. 04 — 26 August 2009
3–26.
Table
Table
3–25.
3–27.
Access
R/W
R/W
R/W
R/W
Chapter 3: LPC24XX System control
Access Reset
R/W
R/W
R/W
see text
0x0000 0145
0x0000 0145
0x00
Reset value
value
0x00
0x00
0x00
[1]
UM10237
© NXP B.V. 2009. All rights reserved.
[1]
Address
0xE01F C180
0xE01F C188
0xE01F C18C
0xE01F C1A0
Address
0xE01F C140
0xE01F C148
0xE01F C14C
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