OM11077 NXP Semiconductors, OM11077 Datasheet - Page 302

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OM11077

Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Datasheets

Specifications of OM11077

Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
NXP Semiconductors
UM10237_4
User manual
6.12 LCD power-up and power-down sequence
The LCD controller requires the following power-up sequence to be performed:
1. When power is applied, the following signals are held LOW:
2. When LCD power is stabilized, a 1 is written to the LcdEn bit in the LCD_CTRL register.
This enables the following signals into their active states:
The LCDV[23:0] signals remain in an inactive state.
3. When the signals in step 2 have stabilized, the contrast voltage (not controlled or
supplied by the LCD controller) is applied to the LCD panel.
4. If required, a software or hardware timer can be used to provide the minimum display
specific delay time between application of the control signals and power to the panel
display. On completion of the time interval, power is applied to the panel by writing a 1 to
the LcdPwr bit within the LCD_CTRL register that, in turn, sets the LCDPWR signal high
and enables the LCDV[23:0] signals into their active states. The LCDPWR signal is
intended to be used to gate the power to the LCD panel.
The power-down sequence is the reverse of the above four steps and must be strictly
followed, this time, writing the respective register bits with 0.
Figure 12–40
LCDLP
LCDDCLK
LCDFP
LCDENAB/ LCDM
LCDVD[23:0]
LCDLE
LCDLP
LCDDCLK
LCDFP
LCDENAB/ LCDM
LCDLE
shows the power-up and power-down sequences.
Rev. 04 — 26 August 2009
Chapter 12: LPC24XX LCD controller
UM10237
© NXP B.V. 2009. All rights reserved.
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