OM11077 NXP Semiconductors, OM11077 Datasheet - Page 443

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

1. Basic configuration
2. Features
UM10237_4
User manual
The UART1 peripheral is configured using the following registers:
1. Power: In the PCONP register
2. Peripheral clock: In the PCLK_SEL0 register
3. Baud rate: In register U1LCR
4. UART FIFO: Use bit FIFO enable (bit 0) in register U0FCR
5. Pins: Select UART pins and pin modes in registers PINSELn and PINMODEn (see
6. Interrupts: To enable UART interrupts set bit DLAB =0 in register U1LCR
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UM10237
Chapter 17: LPC24XX UART1
Rev. 04 — 26 August 2009
Remark: On reset, UART1 is enabled (PCUART1 = 1).
to registers DLL
Also, if needed, set the fractional baud rate in the fractional divider register
(Table
FIFO.
Section
Remark: UART receive pins should not have pull-down resistors enabled.
(Table
in the VIC using the VICIntEnable register
UART1 is identical to UART0/2/3, with the addition of a modem interface.
16 byte Receive and Transmit FIFOs.
Register locations conform to ‘550 industry standard.
Receiver FIFO trigger points at 1, 4, 8, and 14 bytes.
Built-in baud rate generator.
Standard modem interface signals included (CTS, DCD, DTS, DTR, RI, RTS).
LPC2400 UART1 allows for implementation of either software or hardware flow
control.
17–412).
17–405). This enables access to U1IER
9–5).
(Table
Rev. 04 — 26 August 2009
17–399) and DLM
(Table
(Table
17–405), set bit DLAB =1. This enables access
4–63), set bits PCUART1.
(Table
(Table
(Table
(Table
17–400) for setting the baud rate.
7–106).
4–56), select PCLK_UART1.
17–401). Interrupts are enabled
(Table
17–404) to enable
© NXP B.V. 2009. All rights reserved.
User manual
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