OM11077 NXP Semiconductors, OM11077 Datasheet - Page 637

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

NXP Semiconductors
4. Pin description
5. PWM base addresses
6. Register description
UM10237_4
User manual
Table 554. Set and reset inputs for PWM flip-flops
[1]
[2]
Table 25–555
Table 555. Pin summary
Table 556: Addresses for PWM 0 and 1
The PWM0 and PWM1 function adds new registers and registers bits as shown in
Table 25–557
PWM Channel
1
2
3
4
5
6
Pin
PWM0/1[1]
PWM0/1[2]
PWM0/1[3]
PWM0/1[4]
PWM0/1[5]
PWM0/1[6]
PCAP0[0]
PCAP1[1:0]
PWM
0
1
Identical to single edge mode in this case since Match 0 is the neighboring match register. Essentially,
PWM1 cannot be a double edged output.
It is generally not advantageous to use PWM channels 3 and 5 for double edge PWM outputs because it
would reduce the number of double edge PWM outputs that are possible. Using PWM 2, PWM4, and
PWM6 for double edge PWM outputs provides the most pairings.
gives a brief summary of each of PWM related pins.
below.
Type
Output
Output
Output
Output
Output
Output
Input
Base addresses
0xE001 4000
0xE001 8000
Single Edge PWM (PWMSELn = 0)
Set by
Match 0
Match 0
Match 0
Match 0
Match 0
Match 0
Rev. 04 — 26 August 2009
Description
Output from PWM channel 1.
Output from PWM channel 2.
Output from PWM channel 3.
Output from PWM channel 4.
Output from PWM channel 5.
Output from PWM channel 6.
Capture Inputs. A transition on a capture pin can be configured to load
the corresponding Capture register with the value of the Timer Counter
and optionally generate an interrupt. PWM0 brings out one capture
input, PWM1 brings out 2 capture inputs.
Chapter 25: LPC24XX Pulse Width Modulator PWM0/PWM1
Reset by
Match 1
Match 2
Match 3
Match 4
Match 5
Match 6
Double Edge PWM (PWMSELn = 1)
Set by
Match 0
Match 1
Match 2
Match 3
Match 4
Match 5
[1]
[2]
[2]
UM10237
© NXP B.V. 2009. All rights reserved.
Reset by
Match 1
Match 2
Match 3
Match 4
Match 5
Match 6
[1]
[2]
[2]
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