OM11077 NXP Semiconductors, OM11077 Datasheet - Page 599

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

NXP Semiconductors
UM10237_4
User manual
22.9.5.1 I2STAT = 0xF8
22.9.5.2 I2STAT = 0x00
9.5 Miscellaneous states
There are two I2STAT codes that do not correspond to a defined I
Table
This status code indicates that no relevant information is available because the serial
interrupt flag, SI, is not yet set. This occurs between other states and when the I
is not involved in a serial transfer.
This status code indicates that a bus error has occurred during an I
bus error is caused when a START or STOP condition occurs at an illegal position in the
format frame. Examples of such illegal positions are during the serial transfer of an
address byte, a data byte, or an acknowledge bit. A bus error may also be caused when
external interference disturbs the internal I
set. To recover from a bus error, the STO flag must be set and SI must be cleared. This
causes the I
clear the STO flag (no other bits in I2CON are affected). The SDA and SCL lines are
released (a STOP condition is not transmitted).
22–529). These are discussed below.
2
C block to enter the “not addressed” slave mode (a defined state) and to
Rev. 04 — 26 August 2009
2
Chapter 22: LPC24XX I
C block signals. When a bus error occurs, SI is
2
C hardware state (see
2
2
C interfaces I
C serial transfer. A
UM10237
© NXP B.V. 2009. All rights reserved.
2
C block
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C0/1/2