OM11077 NXP Semiconductors, OM11077 Datasheet - Page 321

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

NXP Semiconductors
UM10237_4
User manual
7.23 Cursor Interrupt Mask register (CRSR_INTMSK, RW - 0xFFE1 0C20)
7.24 Cursor Interrupt Clear register (CRSR_INTCLR, RW - 0xFFE1 0C24)
Table 281. Cursor Clip Position register (CRSR_CLIP, RW - 0xFFE1 0C14)
The CRSR_INTMSK register is used to enable or disable the cursor from interrupting the
processor.
The contents of the CRSR_INTMSK register are described in
Table 282. Cursor Interrupt Mask register (CRSR_INTMSK, RW - 0xFFE1 0C20)
The CRSR_INTCLR register is used by software to clear the cursor interrupt status and
the cursor interrupt signal to the processor.
The contents of the CRSR_INTCLR register are described in
Table 283. Cursor Interrupt Clear register (CRSR_INTCLR, RW - 0xFFE1 0C24)
Bits
31:14
13:8
7:6
5:0
Bits
31:1
0
Bits
31:1
0
Function
reserved
CrsrClipY
reserved
CrsrClipX
Function
reserved
CrsrIM
Function
reserved
CrsrIC
Rev. 04 — 26 August 2009
Description
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Cursor clip position for Y direction.
Distance from the top of the cursor image to the first displayed
pixel in the cursor.
When 0, the first displayed pixel is from the top line of the cursor
image.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Cursor clip position for X direction.
Distance from the left edge of the cursor image to the first
displayed pixel in the cursor.
When 0, the first pixel of the cursor line is displayed.
Description
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Cursor interrupt mask.
When clear, the cursor never interrupts the processor.
When set, the cursor interrupts the processor immediately after
reading of the last word of cursor image.
Description
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Cursor interrupt clear.
Writing a 0 to this bit has no effect.
Writing a 1 to this bit causes the cursor interrupt status to be
cleared.
Chapter 12: LPC24XX LCD controller
Table
Table
12–283.
12–282.
UM10237
© NXP B.V. 2009. All rights reserved.
321 of 792
Reset
value
-
0x0
-
0x0
Reset
value
-
0x0
Reset
value
-
0x0