PIC12C672T-10/SM Microchip Technology, PIC12C672T-10/SM Datasheet - Page 182

• Manufacturer Part Number: PIC12C672T-10/SM
• Description: IC MCU OTP 2KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672T-10/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOIC309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

PICmicro MID-RANGE MCU FAMILY
12.1
DS31012A-page 12-2
Introduction
The Timer1 module is a 16-bit timer/counter consisting of two 8-bit registers (TMR1H and
TMR1L) which are readable and writable. The TMR1 Register pair (TMR1H:TMR1L) increments
from 0000h to FFFFh and rolls over to 0000h. The Timer1 Interrupt, if enabled, is generated on
overflow which is latched in the TMR1IF interrupt flag bit. This interrupt can be enabled/disabled
by setting/clearing the TMR1IE interrupt enable bit.
Timer1 can operate in one of three modes:
• As a synchronous timer
• As a synchronous counter
• As an asynchronous counter
The operating mode is determined by clock select bit, TMR1CS (T1CON<1>), and the synchro-
nization bit, T1SYNC
In timer mode, Timer1 increments every instruction cycle. In counter mode, it increments on
every rising edge of the external clock input on pin T1CKI.
Timer1 can be turned on and off using theTMR1ON control bit (T1CON<0>).
Timer1 also has an internal “reset input”, which can be generated by a CCP module.
Timer1 has the capability to operate off an external crystal. When the Timer1 oscillator is enabled
(T1OSCEN is set), the T1OSI and T1OSO pins become inputs. That is, their corresponding TRIS
values are ignored.
Figure 12-1: Timer1 Block Diagram
T1OSO/
T1CKI
T1OSI
Set TMR1IF flag bit
on Overflow
Note 1: When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned
off. This eliminates power drain.
TMR1H
T1OSC
(Figure
TMR1
TMR1L
Oscillator
Enable
12-1).
T1OSCEN
CLR
(1)
Internal
Clock
F
OSC
TMR1ON
/4
CCP Special Trigger
on/off
TMR1CS
1
0
T1CKPS1:T1CKPS0
T1SYNC
Prescaler
1, 2, 4, 8
0
1
1997 Microchip Technology Inc.
2
Synchronized
clock input
Synchronize
SLEEP input
det