PIC12C672T-10/SM Microchip Technology, PIC12C672T-10/SM Datasheet - Page 449

• Manufacturer Part Number: PIC12C672T-10/SM
• Description: IC MCU OTP 2KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672T-10/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOIC309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

1997 Microchip Technology Inc.
Steps for Method 2 (“variable conversion time”):
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Do Conversion Calculations.
11. Go to Step 2.
The maximum Slope A/D timer count is 65,536. It can be clocked by the on-chip or external oscil-
lator. At a 4 MHz oscillation frequency, the maximum conversion time is 16.38 ms for a full count.
A typical conversion should complete before full-count is reached. The timer overflow flag is set
once the timer rolls over (FFFFh to 0000h), and an interrupt occurs, if enabled.
End-user calibration is simplified or eliminated by making use of the on-chip EPROM. Internal
component values are measured at factory final test and stored in the memory for use by the
application firmware.
Periodic conversion cycles should be performed on the bandgap and slope references
(described in Subsection
nent drift. Measurements for the reference voltage counts are equated to the voltage value stored
into EPROM during calibration. Since all measurements are relative to the reference, offset
voltages inherent in the comparator are minimized. The Slope A/D clock source does not require
a precise frequency, only a stable frequency.
See AN624, “PIC14000 Slope A/D Theory and Implementation” for further details of Slope A/D
operation.
Note:
Initialize the Slope A/D module:
Set the ADRST bit (ADCON0<1>), until the ramp capacitor reaches ground. This is capac-
itor dependent. A minimum of 200 s is recommended.
Select Input Channel.
Clear the OVFIF and ADCIF bits.
Initialize Slope A/D Timer (ADTMR). ADTMR value depends on bits of resolution required
(see
To start a conversion, clear the ADRST bit, this allows the ramp capacitor to begin charg-
ing and the ADTMR to increment.
Conversion is complete when the ramp voltage exceeds the analog input so the compar-
ator output changes from high to low. This causes the ADCIF bit to be set.
Check if the ADTMR did not increment more counts than the maximum resolution allowed.
If there were more counts, then the input voltage was out of the A/D input range.
Set the ADRST bit (ADCON0<1>) to stop ADTMR and discharge external capacitor
a)Clear the REFOFF bit (SLPCON<5>).
b)Clear the ADOFF bit (SLPCON<0>).
c)Initialize ADCON1<7:4> to select the programmable current source.
Table
The Slope A/D timer continues to run following a capture event.
24-1).
24.4 “Other Analog Modules”
Section 24. Slope A/D
) to compensate for Slope A/D compo-
DS31024A-page 24-7
24