PIC12C672T-10/SM Microchip Technology, PIC12C672T-10/SM Datasheet - Page 99

• Manufacturer Part Number: PIC12C672T-10/SM
• Description: IC MCU OTP 2KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672T-10/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOIC309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

6.2.4
1997 Microchip Technology Inc.
Program Counter (PC)
The program counter (PC) specifies the address of the instruction to fetch for execution. The PC
is 13-bits wide. The low byte is called the PCL register. This register is readable and writable. The
high byte is called the PCH register. This register contains the PC<12:8> bits and is not directly
readable or writable. All updates to the PCH register go through the PCLATH register.
Figure 6-2
loaded on a write to PCL (PCLATH<4:0>
a GOTO instruction (PCLATH<4:3>
CALL instruction (PCLATH<4:3>
Situation 4 shows how the PC is loaded during one of the return instructions where the PC
loaded (POPed) from the Top of Stack.
Figure 6-2: Loading of PC In Different Situations
Situation 1 - Instruction with PCL as destination
Situation 2 - GOTO Instruction
Situation 3 - CALL Instruction
Situation 4 - RETURN, RETFIE, or RETLW Instruction
Section 6. Memory Organization
PC
PC
PC
PC
shows the four situations for the loading of the PC. Situation 1 shows how the PC is
Note: PCLATH is never updated with the contents of PCH.
12
12 11 10
12 11 10
12 11 10
2
2
5
PCH
PCLATH<4:3>
PCH
PCLATH<4:3>
PCH
PCH
PCLATH
PCLATH
PCLATH
PCLATH<4:0>
8
8
8
PCLATH
8
7
7
7
7
PCL
PCL
PCL
PCL
PCH), with the PC loaded (PUSHed) onto the Top of Stack.
PCH). Situation 3 shows how the PC is loaded during a
11
11
11
PCH). Situation 2 shows how the PC is loaded during
8
ALU result
0
0
0
0
13
13
Opcode <10:0>
Opcode <10:0>
Opcode <10:0>
STACK (13-bits x 8)
STACK (13-bits x 8)
STACK (13-bits x 8)
STACK (13-bits x 8)
Top of STACK
Top of STACK
Top of STACK
Top of STACK
DS31006A-page 6-5
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