The internal oscillator block also provides a stable
reference source for the Fail-Safe Clock Monitor
(FSCM). This option constantly monitors the main clock
source against a reference signal provided by the
internal oscillator and enables the controller to switch to
the internal oscillator, allowing for continued low-speed
operation or a safe application shutdown.
Regardless of the memory size, all the devices share
the same rich set of peripherals, allowing for a smooth
migration path as applications grow and evolve.
The consistent pinout scheme used throughout the
entire family also helps in migrating to the next larger
device. This is true when moving between devices with
the same pin count, or even jumping from 20-pin to
The PIC24F family is pin compatible with devices in the
dsPIC33 family, and shares some compatibility with the
pinout schema for PIC18 and dsPIC30. This extends
the ability of applications to grow from the relatively
simple, to the powerful and complex.
Other Special Features
• Communications: The PIC24F16KA102 family
incorporates a range of serial communication
peripherals to handle a range of application
requirements. There is an I
C™ module that
supports both the Master and Slave modes of
operation. It also comprises UARTs with built-in
encoders/decoders and an SPI module.
• Real-Time Clock/Calendar: This module
implements a full-featured clock and calendar with
alarm functions in hardware, freeing up timer
resources and program memory space for use of
the core application.
• 10-Bit A/D Converter: This module incorporates
programmable acquisition time, allowing for a
channel to be selected and a conversion to be
initiated without waiting for a sampling period, and
faster sampling speed. The 16-deep result buffer
can be used either in Sleep to reduce power, or in
Active mode to improve throughput.
• Charge Time Measurement Unit (CTMU)
Interface: The PIC24F16KA102 family includes
the new CTMU interface module, which can be
used for capacitive touch sensing, proximity
sensing and also for precision time measurement
and pulse generation.
Details on Individual Family
Devices in the PIC24F16KA102 family are available in
20-pin and 28-pin packages. The general block
diagram for all devices is displayed in Figure 1-1.
The devices are different from each other in two ways:
PIC24F08KA devices, 16 Kbytes for PIC24F16KA
Available I/O pins and ports (18 pins on two
ports for 20-pin devices and 24 pins on two ports
for 28-pin devices).
Alternate SCL and SDA pins are available only
in 28-pin devices and not in 20-pin devices.
All other features for devices in this family are identical;
these are summarized in Table 1-1.
PIC24F16KA102 family devices, sorted by function, is
provided in Table 1-2.
Table 1-1 provides the pin location of
individual peripheral features and not how
they are multiplexed on the same pin. This
information is provided in the pinout
diagrams on pages 2, 3 and 4 of the data
sheet. Multiplexed features are sorted by
the priority given to a feature, with the
highest priority peripheral being listed first.
© 2009 Microchip Technology Inc.