RCON: RESET CONTROL REGISTER
BOR: Brown-out Reset Flag bit
1 = A Brown-out Reset has occurred (the BOR is also set after a POR)
0 = A Brown-out Reset has not occurred
POR: Power-on Reset Flag bit
1 = A Power-up Reset has occurred
0 = A Power-up Reset has not occurred
All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting.
RESET FLAG BIT OPERATION
Trap Conflict Event
Illegal Opcode or Uninitialized W Register Access
Configuration Mismatch Reset
PWRSAV #SLEEP Instruction
PWRSAV #IDLE Instruction
PWRSAV #SLEEP instruction with DSCON <DSEN> set
All Reset flag bits may be set or cleared by the user software.
Clock Source Selection at Reset
If clock switching is enabled, the system clock source at
device Reset is chosen as shown in Table 7-2. If clock
switching is disabled, the system clock source is always
selected according to the oscillator Configuration bits.
Refer to Section 8.0 “Oscillator Configuration” for
© 2009 Microchip Technology Inc.
OSCILLATOR SELECTION vs.
TYPE OF RESET (CLOCK
Clock Source Determinant
FNOSC Configuration bits
COSC Control bits
PWRSAV Instruction, POR