MC68HC908RF2CFA Freescale Semiconductor, MC68HC908RF2CFA Datasheet - Page 110

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MC68HC908RF2CFA

Manufacturer Part Number
MC68HC908RF2CFA
Description
IC MCU W/UHF TX 2K FLASH 32LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908RF2CFA

Core Processor
HC08
Core Size
8-Bit
Speed
4MHz
Peripherals
LVD, POR, PWM, RF Mod
Number Of I /o
12
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-

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Input/Output (I/O) Ports
9.3 Port B
9.3.1 Port B Data Register
Data Sheet
110
NOTE:
AlternateFunction:
Setting a keyboard interrupt enable bit (KBIEx) forces the corresponding keyboard
interrupt pin to be an input, overriding the data direction register. However, the data
direction register bit must be a 0 for software to read the pin.
Port B is a 4-bit special function port that shares two of its pins with the timer (TIM)
module and one with the buffered internal bus clock MCLK.
The port B data register (PTB) contains a data latch for each of the four port B pins.
PTB[3:0] — Port B Data Bits
Notes:
1. X = Don’t care
2. Keyboard interrupt enable bit (see
3. Writing affects data register, but does not affect input.
4. I/O pin pulled up to V
5. Hi-Z = High impedance
KBIE
These read/write bits are software-programmable. Data direction of each port B
pin is under the control of the corresponding bit in data direction register B.
Reset has no effect on port B data.
Address:
Bit
1
0
0
Reset:
Read:
Write:
(2)
Freescale Semiconductor, Inc.
For More Information On This Product,
DDRA
$0001
Bit 7
Bit
X
0
1
Go to: www.freescale.com
Figure 9-5. Port B Data Register (PTB)
= Unimplemented
Input/Output (I/O) Ports
DD
PTA
X
Bit
X
X
(1)
by internal pullup device
6
Table 9-1. Port A Pin Functions
Input, V
Input, Hi-Z
7.5.2 Keyboard Interrupt Enable
I/O Pin
Output
5
Mode
DD
(4)
(5)
Unaffected by reset
4
Read/Write
DDRA[7:0]
DDRA[7:0]
DDRA[7:0]
Accesses
to DDRA
PTB3
TCLK
3
PTB2
TCH0
MC68HC908RF2 — Rev. 4.0
2
PTA[7:0]
Register)
Read
Pin
Pin
Accesses to PTA
PTB1
1
PTA[7:0]
PTA[7:0]
MOTOROLA
PTA[7:0]
Write
MCLK
PTB0
Bit 0
(3)
(3)

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